The PCA9537 is a 10-pin CMOS device that provides 4 bits of General Purpose parallel Input/Output (GPIO) expansion with interrupt and reset for I²C-bus/SMBus applications and was developed to enhance the NXP® Semiconductors family of I²C-bus I/O expanders. I/O expanders provide a simple solution when additional I/O is needed for ACPI power switches, sensors, push-buttons, LEDs, fans, etc.
The PCA9537 consists of a 4-bit Configuration register (input or output selection), 4-bit Input Port register, 4-bit Output Port register and a 4-bit Polarity Inversion register (active HIGH or active LOW operation). The system master can enable the I/Os as either inputs or outputs by writing to the I/O configuration bits. The data for each input or output is kept in the corresponding Input Port or Output Port register. The polarity of the Input Port register can be inverted with the Polarity Inversion register. All registers can be read by the system master.
The PCA9537 open-drain interrupt output (INT) is activated when any input state differs from its corresponding Input Port register state and is used to indicate to the system master that an input state has changed. The power-on reset sets the registers to their default values and initializes the device state machine. The RESET pin causes the same reset/initialization to occur without de-powering the device.
The I²C-bus address is fixed and allows only one device on the same I²C-bus/SMBus.
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## Features
* 4-bit I²C-bus GPIO with interrupt and reset
* Operating power supply voltage range of 2.3 V to 5.5 V
* 5 V tolerant I/Os
* Polarity Inversion register
* Active LOW interrupt output
* Active LOW reset input
* Low standby current
* Noise filter on SCL/SDA inputs
* No glitch on power-up
* Internal power-on reset
* 4 I/O pins that default to 4 inputs
* 0 Hz to 400 kHz clock frequency
* ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per JESD22-A115 and 1000 V CDM per JESD22-C101
* Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA
