The MSP430™ ultra-low-power (ULP) FRAM platform combines uniquely embedded FRAM and a holistic ultra-low-power system architecture, allowing innovators to increase performance at lowered energy budgets. FRAM technology combines the speed, flexibility, and endurance of SRAM with the stability and reliability of flash at much lower power.
The MSP430 ULP FRAM portfolio consists of a diverse set of devices featuring FRAM, the ULP 16-bit MSP430 CPU, and intelligent peripherals targeted for various applications. The ULP architecture showcases seven low-power modes, optimized to achieve extended battery life in energy-challenged applications.
Embedded Microcontroller
16-Bit RISC Architecture up to 16‑MHz Clock
Wide Supply Voltage Range
(1.8 V to 3.6 V) (1)
Optimized Ultra-Low-Power Modes
Active Mode: Approximately 100 µA/MHz
Standby (LPM3 With VLO): 0.4 µA (Typical)
Real-Time Clock (LPM3.5): 0.25 µA (Typical) (2)
Shutdown (LPM4.5): 0.02 µA (Typical)
Ultra-Low-Power Ferroelectric RAM (FRAM)
Up to 64KB of Nonvolatile Memory
Ultra-Low-Power Writes
Fast Write at 125 ns Per Word (64KB in 4 ms)
Unified Memory = Program + Data + Storage in One Single Space
1015 Write Cycle Endurance
Radiation Resistant and Nonmagnetic
Intelligent Digital Peripherals
32-Bit Hardware Multiplier (MPY)
3-Channel Internal DMA
Real-Time Clock (RTC) With Calendar and Alarm Functions
Five 16-Bit Timers With up to Seven Capture/Compare Registers Each
16-Bit Cyclic Redundancy Checker (CRC)
High-Performance Analog
16-Channel Analog Comparator
12-Bit Analog-to-Digital Converter (ADC)
With Internal Reference and Sample-and-Hold
and up to 16 External Input Channels
Multifunction Input/Output Ports
All Pins Support Capacitive Touch Capability With No Need for External Components
Accessible Bit-, Byte-, and Word-Wise (in Pairs)
Edge-Selectable Wake From LPM on All Ports
Programmable Pullup and Pulldown on All Ports
Code Security and Encryption
128-Bit or 256-Bit AES Security Encryption and Decryption Coprocessor
Random Number Seed for Random Number Generation Algorithms
Enhanced Serial Communication
eUSCI_A0 and eUSCI_A1 Support
UART With Automatic Baud-Rate Detection
IrDA Encode and Decode
SPI
eUSCI_B0 Supports
I2C With Multiple Slave Addressing
SPI
Hardware UART and I2C Bootloader (BSL)
Flexible Clock System
Fixed-Frequency DCO With 10 Selectable Factory-Trimmed Frequencies
