The UJA1075A core System Basis Chip (SBC) replaces the basic discrete components commonly found in Electronic Control Units (ECU) with a high-speed Controller Area Network (CAN) and a Local Interconnect Network (LIN) interface.
The UJA1075A supports the networking applications used to control power and sensor peripherals by using a high-speed CAN as the main network interface and the LIN interface as a local sub-bus.
General description
The UJA1075 core System Basis Chip (SBC) replaces the basic discrete components commonly found in Electronic Control Units (ECU) with a high-speed Controller Area Network (CAN) and a Local Interconnect Network (LIN) interface.
The UJA1075 supports the networking applications used to control power and sensor peripherals by using a high-speed CAN as the main network interface and the LIN interface as a local sub-bus.
Features and benefits
General
Contains a full set of CAN and LIN ECU functions:
CAN transceiver and LIN transceiver
Scalable 3.3 V or 5 V voltage regulator delivering up to 250 mA for a microcontroller and peripheral circuitry; an external PNP transistor can be connected for better heat distribution over the PCB
Separate voltage regulator for the CAN transceiver (5 V)
Watchdog with Window and Timeoutmodes and on-chip oscillator
Serial Peripheral Interface (SPI) for communicating with the microcontroller
±8 kV ElectroStatic Discharge (ESD) protection Human Body Model (HBM) on the CAN/LIN bus pins and the wake pins
±6 kV ElectroStatic Discharge (ESD) protection IEC 61000-4-2 on the CAN/LIN bus pins and the wake pins
±58 V short-circuit proof CAN/LIN bus pins
Battery and CAN/LIN bus pins are protected against transients in accordance with ISO 7637-3
Supports remote flash programming via the CAN bus
Small 6.1 mm ×11 mm HTSSOP32 package with low thermal resistance
Pb-free; RoHS and dark green compliant
CAN transceiver
ISO 11898-2 and ISO 11898-5 compliant high-speed CAN transceiver
Dedicated low dropout voltageregulator for the CAN bus:
Independent of the microcontroller supply
Significantly improves EMC performance
Bus connections are truly floating when power is off
SPLIT output pin for stabilizing the recessive bus level
LIN transceiver
LIN 2.1 compliant LIN transceiver
Compliant with SAE J2602
Downward compatible with LIN 2.0 and LIN 1.3
Low slope mode for optimized EMC performance
Integrated LIN termination diode at pin DLIN
Power management
Wake-up via CAN, LIN or local wake pins with wake-up source detection
2 Wake pins:
WAKE1 and WAKE2 inputs can be switched off to reduce current flow
Output signal (WBIAS) to bias the wake pins, selectable sampling time of 16 ms or 64 ms
Standby mode with very low standby current and full wake-up capability; V1 active to maintain supply to the microcontroller
Sleep mode with very low sleep current and full wake-up capability
Control and Diagnostic features
Safe and predictable behavior under all conditions
Programmable watchdog with independent clock source:
Window, Timeout (with optional cyclic wake-up) and Off modes supported (with automatic re-enable in the event of an interrupt)
16-bit Serial Peripheral Interface (SPI) for configuration, control and diagnosis
Global enable output for controlling safety-critical hardware
Limp home output (LIMP) for activating application-specific ‘limp home’ hardware in the event of a serious system malfunction
Overtemperature shutdown
Interrupt output pin; interrupts can be individually configured to signal V1/V2 undervoltage, CAN/LIN/local wake-up and cyclic and power-on interrupt events
Bidirectional reset pin with variable power-on reset length to support a variety of microcontrollers
