The TMS320C67x DSPs (including the TMS320C6711, TMS320C6711B, TMS320C6711C, TMS320C6711D devices†) compose the floating-point DSP family in the TMS320C6000 DSP platform. The C6711, C6711B, C6711C, and C6711D devices are based on the high-performance, advanced very-long-instruction-word (VLIW) architecture developed by Texas Instruments (TI), making these DSPs an excellent choice for multichannel and multifunction applications.
• Excellent-Price/Performance Floating-Point
Digital Signal Processors (DSPs): TMS320C67x™ (C6711, C6711B and C6711C)
− Eight 32-Bit Instructions/Cycle
− 100-, 150-, 167-, 200-MHz Clock Rates
− 10-, 6.7-, 6-, 5-ns Instruction Cycle Time
− 600, 900, 1000, 1200 MFLOPS
• Advanced Very Long Instruction Word (VLIW) C67x™ DSP Core
− Eight Highly Independent Functional Units:
− Four ALUs (Floating- and Fixed-Point)
− Two ALUs (Fixed-Point)
− Two Multipliers (Floating- and Fixed-Point)
− Load-Store Architecture With 32 32-Bit General-Purpose Registers
− Instruction Packing Reduces Code Size
− All Instructions Conditional
• Instruction Set Features
− Hardware Support for IEEE Single-Precision and Double-Precision Instructions
− Byte-Addressable (8-, 16-, 32-Bit Data)
− 8-Bit Overflow Protection
− Saturation
− Bit-Field Extract, Set, Clear
− Bit-Counting
− Normalization
• L1/L2 Memory Architecture
− 32K-Bit (4K-Byte) L1P Program Cache (Direct Mapped)
− 32K-Bit (4K-Byte) L1D Data Cache (2-Way Set-Associative)
