The TMS320VC5470 integrates a DSP subsystem based on the TMS320C54x architecture and a RISC microcontroller subsystem based on the ARM7TDMI core as shown in Figure 2-1. The DSP subsystem includes 72K x 16-bit SRAM, a timer, a DMA controller, an external memory interface, and two McBSPs. The MCU subsystem includes three timers, general-purpose I/O, and an external memory interface.
The TMS320VC5470 is implemented as two major subsystems that are highly independent. The DSP subsystem includes the following modules:
TMS320C54x DSP core
72K x 16-bit internal SRAM organized as 32K x 16-bit of data SRAM and 40K x 16-bit of program SRAM.
ARM port interface (API) to provide access by the MCU to 8K x 16 of the DSPs data SRAM
Two multichannel buffered serial ports (McBSPs)
Phase-locked loop (PLL)
Timer
Direct memory access (DMA) controller
Programmable wait-state generator
External memory interface
The MCU subsystem includes the following modules:
ARM7TDMI CPU core (32/16-bit RISC processor) with extended emulation capabilities
MCU memory interface for external SRAM, Flash, ROM, and SDRAM.
On-chip 16K-byte (4K x 32) zero wait-state SRAM.
MCU general-purpose I/Os (GPIOs), including support for an 8 x 8 keyboard.
Three timers (two general-purpose, one watchdog)
IrDA-compatible UART, supporting two modes
IrDA mode
UART mode without hardware flow control
UART/Modem, with
hardware flow control support
autobaud function
MCU subsystem interrupt handler
Clock generator and control
I2C "master-only" interface
Serial peripheral interface
Phase-locked loop (PLL)
Dual CPU Processor Integrating a TMS320C54x DSP and an ARM7TDMI RISC MCU
16-Bit Low-Power DSP With 72K x 16-bit Integrated SRAM Operates at up to 100 MHz
Smart Power Management and Low-Power Modes for DSP and MCU Subsystems
Integrated DSP Subsystem Peripherals
Two High-Speed, Full-Duplex Multichannel Buffered Serial Ports (McBSPs) Allowing the DSP Core to Interface Directly With CODECs
Six-Channel Direct Memory Access (DMA) Controller Enabling Six Independent Block Transfers With No Intervention From the DSP
ARM Port Interface (API) Provides 2K x 16-Bit Shared Memory Interface for Efficient Information Exchange Between the MCU Subsystem and the DSP Subsystem CPUs
External Memory Interface
Software-Programmable Wait-State Generator Capable of Extending External Bus Cycles By Up To 14 Machine Cycles
One Software-Programmable Hardware Timer For Control Operations
