The TMS320C6202 and TMS320C6202B devices are part of the TMS320C62x fixed-point DSP generation in the TMS320C6000 DSP platform. The C62x DSP devices are based on the high-performance, advanced VelociTI very-long-instruction-word (VLIW) architecture developed by Texas Instruments (TI), making these DSPs an excellent choice for multichannel and multifunction applications.
The TMS320C62x DSP offers cost-effective solutions to high-performance DSP-programming challenges. The TMS320C6202/02B has a performance capability of up to 2400 million instructions per second (MIPS) at 300 MHz. The C6202/02B DSP possesses the operational flexibility of high-speed controllers and the numerical capability of array processors. These processors have 32 general-purpose registers of 32-bit word length and eight highly independent functional units. The eight functional units provide six arithmetic logic units (ALUs) for a high degree of parallelism and two 16-bit multipliers for a 32-bit result. The C6202/02B can produce two multiply-accumulates (MACs) per cycle. This gives a total of 600 million MACs per second (MMACS) for the C6202/02B device. The C6202/02B DSP also has application-specific hardware logic, on-chip memory, and additional on-chip peripherals.
The C6202/02B devices program memory consists of two blocks, with a 128K-byte block configured as memory-mapped program space, and the other 128K-byte block user-configurable as cache or memory-mapped program space. Data memory for the C6202/02B consists of two 64K-byte blocks of RAM.
The C6202/02B device has a powerful and diverse set of peripherals. The peripheral set includes three multichannel buffered serial ports (McBSPs), two general-purpose timers, a 32-bit expansion bus (XBus) that offers ease of interface to synchronous or asynchronous industry-standard host bus protocols, and a glueless 32-bit external memory interface (EMIF) capable of interfacing to SDRAM or SBSRAM and asynchronous peripherals.
The C62x devices have a complete set of development tools which includes: a new C compiler, an assembly optimizer to simplify programming and scheduling, and a Windows debugger interface for visibility into source code execution.
High-Performance Fixed-Point Digital Signal Processors (DSPs) TMS320C62x
5-, 4-, 3.33-ns Instruction Cycle Time
200-, 250-, 300-MHz Clock Rate
Eight 32-Bit Instructions/Cycle
1600, 2000, 2400 MIPS
C6202 and C6203B GLS Ball Grid Array (BGA) Packages are Pin-Compatible With the C6204 GLW BGA Package
C6202B and C6203B GNZ and GNY Packages are Pin-Compatible
