The medium-density value line STM8L052C6 devices are members of the STM8L ultra-low-power 8-bit family.
The value line STM8L05xxx ultra-low-power family features the enhanced STM8 CPU core providing increased processing power (up to 16 MIPS at 16 MHz) while maintaining the advantages of a CISC architecture with improved code density, a 24-bit linear addressing space and an optimized architecture for low power operations.
The family includes an integrated debug module with a hardware interface (SWIM) which allows non-intrusive In-application debugging and ultra-fast Flash programming.
Medium-density value line STM8L052C6 microcontrollers feature embedded data EEPROM and low-power, low-voltage, single-supply program Flash memory.
All devices offer 12-bit ADC, real-time clock, 16-bit timers, one 8-bit timer as well as standard communication interface such as SPI, I2C, USART and 4x28-segment LCD. The 4x 28-segment LCD is available on the medium-density value line STM8L052C6.
The STM8L052C6 operates from 1.8 V to 3.6 V and is available in the -40 to +85 °C temperature range.
The modular design of the peripheral set allows the same peripherals to be found in different ST microcontroller families including 32-bit families. This makes any transition to a different family very easy, and simplified even more by the use of a common set of development tools.
All value line STM8L ultra-low-power products are based on the same architecture with the same memory mapping and a coherent pinout.
**Key Features**
Operating conditions
Operating power supply: 1.8 V to 3.6 V
Temperature range: -40 °C to 85 °C
Low-power features
Five low-power modes: Wait, Low-power run (5.1 μA), Low-power wait (3 μA), Active-halt with full RTC (1.3 μA), Halt (350 nA)
Consumption: 195 μA/MHz + 440 μA
Ultra-low leakage per I/0: 50 nA
Fast wakeup from Halt: 4.7 μs
Advanced STM8 core
Harvard architecture and 3-stage pipeline
Max freq. 16 MHz, 16 CISC MIPS peak
Up to 40 external interrupt sources
Reset and supply management
Low-power, ultra-safe BOR reset with five selectable thresholds
Ultra-low-power POR/PDR
Programmable voltage detector (PVD)
Clock management
32 kHz and 1 to 16 MHz crystal oscillator
Internal 16 MHz factory-trimmed RC
Internal 38 kHz low consumption RC
Clock security system
Low-power RTC
BCD calendar with alarm interrupt
Auto-wakeup from Halt w/ periodic interrupt
LCD: up to 4x28 segments w/ step-up converter
Memories
32 KB Flash program memory and 256 bytes data EEPROM with ECC, RWW
Flexible write and read protection modes
2 Kbytes of RAM
DMA
Four channels supporting ADC, SPI, I2C, USART, timers
One channel for memory-to-memory
12-bit ADC up to 1 Msps/25 channels
Internal reference voltage
Timers
Two 16-bit timers with two channels (used as IC, OC, PWM), quadrature encoder
One 16-bit advanced control timer with three channels, supporting motor control
One 8-bit timer with 7-bit prescaler
Two watchdogs: one Window, one Independent
Beeper timer with 1-, 2- or 4-kHz frequencies
Communication interfaces
Synchronous serial interface (SPI)
Fast I2 C 400 kHz SMBus and PMBus
USART (ISO 7816 interface and IrDA)
Up to 41 I/Os, all mappable on interrupt vectors
Development support
Fast on-chip programming and non- intrusive debugging with SWIM
