The SN74AHC16541DL is a non-inverting 16-bit Buffer composed of two 8-bit sections with separate output-enable signals. For either 8-bit buffer section, the two output-enable inputs must be low for the corresponding Y outputs to be active. If either output-enable input is high, the outputs of that 8-bit buffer section are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pull-up resistor and the minimum value of the resistor is determined by the current-sinking capability of the driver.
EPIC™ (Enhanced-Performance Implanted CMOS) process
Distributed VCC and GND pins minimize high-speed switching noise
