The "ABT16374A are 16-bit edge-triggered D-type flip-flops with 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
These devices can be used as two 8-bit flip-flops or one 16-bit flip-flop. On the positive transition of the clock (CLK) input, the Q outputs of the flip-flop take on the logic levels set up at the data (D) inputs.
A buffered output-enable (OE\\) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without need for interface or pullup components
OE\ does not affect internal operations of the flip-flop. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.
When VCC is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 2.1 V, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
The SN54ABT16374A is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ABT16374A is characterized for operation from -40°C to 85°C.
Members of the Texas Instruments **_Widebus_**TM Family
State-of-the-Art **_EPIC-_**II **_B_**TM BiCMOS Design Significantly Reduces Power Dissipation
ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015
Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17
Typical V**OLP** (Output Ground Bounce) < 0.8 V at V**CC** = 5 V, T**A** = 25°C
High-Impedance State During Power Up and Power Down
Distributed V**CC** and GND Pin Configuration Minimizes High-Speed Switching Noise
