The SN65MLVD040RGZT is a 4-channel half-duplex M-LVDS Line Transceiver for transmitting and receiving multipoint-low-voltage differential signals in full compliance with the TIA/EIA-899 (M-LVDS) standard, which are optimized to operate at signaling rates up to 250Mbps. The driver output has been designed to support multipoint buses presenting loads as low as 30R and incorporates controlled transition times to allow for stubs off of the backplane transmission line. The M-LVDS standard defines two types of receivers, designated as type-1 and type-2. Type-1 receiver has thresholds centred about zero with 25mV of hysteresis to prevent output oscillations with loss of input, type-2 receiver implement a failsafe by using an offset threshold. The xFSEN pins is used to select the type-1 and type-2 receiver for each of the channels. In addition, the driver rise and fall times are between 1 and 2ns.
Controlled driver output voltage transition times for improved signal quality
Bus pins high impedance when driver disabled or VCC
Independent enables for each driver and receiver
M-LVDS bus power up/down glitch-free
125MHz Clock frequency
-1 to 3.4V Common-mode voltage range allows data transfer with 2V of ground noise