This document contains device specific information for the following four devices:
1\. PIC18C242
2\. PIC18C252
3\. PIC18C442
4\. PIC18C452
These devices come in 28-pin and 40-pin packages. The 28-pin devices do not have a Parallel Slave Port (PSP) implemented and the number of Analog-to Digital (A/D) converter input channels is reduced to 5. An overview of features is shown in Table 1-1.
The following two figures are device block diagrams sorted by pin count: 28-pin for Figure 1-1 and 40-pin for Figure 1-2. The 28-pin and 40-pin pinouts are listed in Table 1-2 and Table 1-3, respectively.
High Performance RISC CPU:
• C compiler optimized architecture/instruction set
- Source code compatible with the PIC16CXX instruction set
• Linear program memory addressing to 2 Mbytes
• Linear data memory addressing to 4 Kbytes
• Up to 10 MIPs operation:
- DC - 40 MHz osc./clock input
- 4 MHz - 10 MHz osc./clock input with PLL active
• 16-bit wide instructions, 8-bit wide data path
• Priority levels for interrupts
• 8 x 8 Single Cycle Hardware Multiplier
Peripheral Features:
• High current sink/source 25 mA/25 mA
• Three external interrupt pins
• Timer0 module: 8-bit/16-bit timer/counter with 8-bit programmable prescaler
• Timer1 module: 16-bit timer/counter
• Timer2 module: 8-bit timer/counter with 8-bit period register (time-base for PWM)
