Introduction nOverview nThe MC9S12E-Family is a 112/80 pin low cost general purpose MCU family. All members of the MC9S12E-Family are comprised of standard on-chip peripherals including a 16-bit central processing unit (HCS12 CPU), up to 256K bytes of Flash EEPROM, up to 16K bytes of RAM, three asynchronous serial communications interface modules (SCI), a serial peripheral interface (SPI), an Inter-IC Bus (IIC), three 4-channel 16-bit timer modules (TIM), a 6-channel 15-bit Pulse Modulator with Fault protection module (PMF), a 6-channel 8-bit Pulse Width Modulator (PWM), a 16-channel 10-bit analog-to-digital converter (ADC), and two 1-channel 8-bit digital-to-analog converters (DAC). The MC9S12E-Family has full 16-bit data paths throughout. The inclusion of a PLL circuit allows power consumption and performance to be adjusted to suit operational requirements. In addition to the I/O ports available on each module, 16 dedicated I/O port bits are available with Wake-Up capability from STOP or WAIT mode. Furthermore, an on chip bandgap based voltage regulator (VREG) generates the internal digital supply voltage of 2.5V (VDD) from a 3.135V to 5.5V external supply range.nFeatures n• 16-bit HCS12 CORE n – HCS12 CPU n i. Upward compatible with M68HC11 instruction set n ii. Interrupt stacking and programmer’s model identical to M68HC11 n iii. Instruction queue n iv. Enhanced indexed addressing n – Module Mapping Control (MMC) n – Interrupt Control (INT) n – Background Debug Module (BDM) n – Debugger (DBG12) including breakpoints and change-of-flow trace buffer n – Multiplexed External Bus Interface (MEBI) n• Wake-Up interrupt inputs n – Up to 16 port bits available for wake up interrupt function with digital filtering n• Memory options n – 32K, 64K, 128K or 256K Byte Flash EEPROM n – 2K, 4K, 8K or 16K Byte RAM n• Two 1-channel Digital-to-Analog Converters (DAC) n – 8-bit resolution n• Analog-to-Digital Converter (ADC) n – 16-channel module with 10-bit resolution n – External conversion trigger capability n• Three 4-channel Timers (TIM) n – Programmable input capture or output compare channels n – Simple PWM mode n – Counter Modulo Reset n – External Event Counting n – Gated Time Accumulation n• 6 PWM channels (PWM) n – Programmable period and duty cycle n – 8-bit 6-channel or 16-bit 3-channel n – Separate control for each pulse width and duty cycle n – Center-aligned or left-aligned outputs n – Programmable clock select logic with a wide range of frequencies n – Fast emergency shutdown input n• 6-channel Pulse width Modulator with Fault protection (PMF) n – Three independent 15-bit counters with synchronous mode n – Complementary channel operation n – Edge and center aligned PWM signals n – Programmable dead time insertion n – Integral reload rates from 1 to 16 n – Four fault protection shut down input pins n – Three current sense input pins n• Serial interfaces n – Three asynchronous serial communication interfaces (SCI) n – Synchronous serial peripheral interface (SPI) n – Inter-IC Bus (IIC) n• Clock and Reset Generator (CRG) n – Windowed COP watchdog n – Real Time interrupt n – Clock Monitor n – Pierce or low current Colpitts oscillator n – Phase-locked loop clock frequency multiplier n – Self Clock mode in absence of external clock n – Low power 0.5 to 16Mhz crystal oscillator reference clock n• Operating frequency n – 50MHz equivalent to 25MHz Bus Speed n• Internal 2.5V Regulator n – Input voltage range from 3.135V to 5.5V n – Low power mode capability n – Includes low voltage reset (LVR) circuitry n – Includes low voltage interrupt (LVI) circuitry n• 112-Pin LQFP or 80-Pin QFP package n – Up to 90 I/O lines with 5V input and drive capability (112 pin package) n – Up to two dedicated 5V input only lines (IRQ and XIRQ) n – Sixteen 3.3V/5V A/D converter inputs n• Development Support. n – Single-wire background debugTM mode n – On-chip hardware breakpoints n – Enhanced debug features
