The LPC1315/16/17/45/46/47 are ARM Cortex-M3 based microcontrollers for embedded
applications featuring a high level of integration and low power consumption. The ARM
Cortex-M3 is a next generation core that offers system enhancements such as enhanced
debug features and a higher level of support block integration.
Features and benefits
System:
ARM Cortex-M3 r2p1 processor, running at frequencies of up to 72 MHz.
ARM Cortex-M3 built-in Nested Vectored Interrupt Controller (NVIC).
Non Maskable Interrupt (NMI) input selectable from several input sources.
System tick timer.
Memory:
Up to 64 kB on-chip flash program memory with a 256 byte page erase function.
In-System Programming (ISP) and In-Application Programming (IAP) via on-chip bootloader software. Flash updates via USB supported.
Up to 4 kB on-chip EEPROM data memory with on-chip API support.
Up to 12 kB SRAM data memory.
16 kB boot ROM with API support for USB API, power control, EEPROM, and flash IAP/ISP.
Debug options:
Standard JTAG test interface for BSDL.
Serial Wire Debug.
Support for ETM ARM Cortex-M3 debug time stamping.
Digital peripherals:
Up to 51 General Purpose I/O (GPIO) pins with configurablepull-up/pull-down resistors, repeater mode, input inverter, and pseudo open-drain mode. Eight pins support programmable glitch filter.
Up to 8 GPIO pins can be selected as edge and level sensitive interrupt sources.
Two GPIO grouped interrupt modules enable an interrupt based on a programmable pattern of input states of a group of GPIO pins.
High-current source output driver (20 mA) on one pin (P0_7).
High-current sink driver (20 mA) on true open-drain pins (P0_4 and P0_5).
Four general purpose counter/timers with a total of up to 8 capture inputs and 13 match outputs.
Programmable Windowed WatchDog Timer (WWDT) with a internal low-power WatchDog Oscillator (WDO).
Repetitive Interrupt Timer (RI Timer).
Analog peripherals:
12-bit ADC with eight input channels and sampling rates of up to 500 kSamples/s.
Serial interfaces:
USB 2.0 full-speed device controller (LPC1345/46/47) with on-chip ROM-based USB driver library.
USART with fractional baud rate generation, internal FIFO, a full modem control handshake interface, and support for RS-485/9-bit mode and synchronous mode. USART supports an asynchronous smart card interface (ISO 7816-3).
Two SSP controllers with FIFO and multi-protocol capabilities.
I2C-bus interface supporting the full I2C-bus specification andFast-mode Plus with a data rate of up to 1 Mbit/s with multiple address recognition and monitor mode.
Clock generation:
Crystal Oscillator with an operating range of 1 MHz to 25 MHz (system oscillator) with failure detector.
12 MHz high-frequency Internal RC oscillator (IRC) trimmed to 1 % accuracy over the entire voltage and temperature range. The IRC can optionally be used as a system clock.
Internal low-power, low-frequency WatchDog Oscillator (WDO) with programmable frequency output.
PLL allows CPU operation up to the maximum CPU rate with the system oscillator or the IRC as clock sources.
A second, dedicated PLL is provided for USB (LPC1345/46/47).
Clock output function with divider that can reflect the crystal oscillator, the main clock, the IRC, or the watchdog oscillator.
Power control:
Four reduced power modes: Sleep, Deep-sleep, Power-down, and Deep power-down.
Power profiles residing in boot ROM allow optimized performance and minimized power consumption for any given application through one simple function call.
Processor wake-up from Deep-sleep and Power-down modes via reset, selectable GPIO pins, watchdog interrupt, or USB port activity.
Processor wake-up from Deep power-down mode using one special function pin.
Integrated PMU (Power Management Unit) to minimize power consumption during Sleep, Deep-sleep, Power-down, and Deep power-down modes.
Power-On Reset (POR).
Brownout detect with up to four separate thresholds for interrupt and forced reset.
Unique device serial number for identification.
Single 3.3 V power supply (2.0 V to 3.6 V).
Temperature range 40 C to +85 C.
Available as LQFP64, LQFP48, and HVQFN33 package.
