The LPC11C14FBD48 is an ARM Cortex-M0 microcontroller designed for 8/16-bit microcontroller applications, offering performance, low power, simple instruction set and memory addressing together with reduced code size compared to existing 8/16-bit architectures. The peripheral complement of the LPC11C14FBD48 includes 32 kB of flash memory, 8 kB of data memory, one C_CAN controller, one Fast-mode Plus I²C-bus interface, one RS-485/EIA-485 UART, two SPI interfaces with SSP features, four general purpose counter/timers, a 10-bit ADC, and 40 general purpose I/O pins. On-chip C_CAN drivers and flash In-System Programming tools via C_CAN are included.
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## Features
* System:
* ARM Cortex-M0 processor, running at frequencies of up to 50 MHz
* ARM Cortex-M0 built-in Nested Vectored Interrupt Controller (NVIC)
* Serial Wire Debug
* System tick timer
* Memory:
* 32 kB on-chip flash program memory
* 8 kB SRAM data memory
* In-System Programming (ISP) and In-Application Programming (IAP) via on-chip bootloader software
* Flash ISP commands can be issued via UART or C_CAN
* Digital peripherals:
* 40 General Purpose I/O (GPIO) pins with configurable pull-up/-down resistors
* GPIO pins can be used as edge and level sensitive interrupt sources
* High-current output driver (20 mA) on one pin
* High-current sink drivers (20 mA) on two I²C-bus pins in Fast-mode Plus
* Four general purpose counter/timers with 4 capture inputs and 13 match outputs
* Programmable WatchDog Timer (WDT)
* Analog peripherals:
* 10-bit ADC with input multiplexing among 8 pins
* Serial interfaces:
* UART with fractional baud rate generation, internal FIFO, and RS-485 support
* Two SPI controllers with SSP features and with FIFO and multi-protocol capabilities
* I²C-bus interface supporting full I²C-bus specification and Fast-mode Plus with a data rate of 1 Mbit/s with multiple address recognition and monitor mode
* C_CAN controller. On-chip C_CAN and CANopen drivers included
* Clock generation:
* 12 MHz internal RC oscillator trimmed to 1 % accuracy that can optionally be used as a system clock
* Crystal oscillator with an operating range of 1 MHz to 25 MHz
* Programmable watchdog oscillator with a frequency range of 7.8 kHz to 1.8 MHz
* PLL allows CPU operation up to the maximum CPU rate without the need for a high-frequency crystal. May be run from the system oscillator or the internal RC oscillator
* Clock output function with divider that can reflect the system oscillator, IRC, CPU clock, or the Watchdog clock
* Power control:
* Integrated PMU (Power Management Unit) to minimize power consumption during Sleep, Deep-sleep, and Deep power-down modes
* Three reduced power modes: Sleep, Deep-sleep, and Deep power-down
* Processor wake-up from Deep-sleep mode via a dedicated start logic using 13 of the GPIO pins
* Power-On Reset (POR).
* Brownout detect with four separate thresholds for interrupt and forced reset
