The CD74HC597M is a 8-bit CMOS Shift Register with input storage. It is pin compatible with the LSTTL 597 devices. Each device consists of an 8-flip-flop input register and an 8-bit parallel-in/serial-in, serial-out shift register. Each register is controlled by its own clock. A "low" on the parallel load input (PL\\) shifts parallel stored data asynchronously into the shift register. A "low" master input (MR\\) clears the shift register. serial input data can also be synchronously shifted through the shift register when PL\ is high.
Buffered inputs
Synchronous parallel load
Balanced propagation delay and transition times
Significant power reduction compared to LSTTL logic ICs
