The CD74HC4024M is a 7-stage high speed CMOS Binary Ripple Counter features that all the counter stages are master-slave flip-flops. The state of the stage advances one count on the negative transition of each input pulse, a high voltage level on the MR line resets all counters to their zero state. All inputs and outputs are buffered.
Fully static operation
Buffered inputs
Common reset
Negative edge clocking
Balanced propagation delay and transition times
Significant power reduction compared to LSTTL logic ICs
