The CD4520BE is a CMOS dual binary Up-counter consists of two identical, internally synchronous 4-stage counters. The counter stages are D-type flip-flops having interchangeable CLOCK and ENABLE lines for incrementing on either the positive-going or negative-going transition. For single-unit operation the ENABLE input is maintained high and the counter advances on each positive-going transition of the CLOCK. The counter is cleared by high levels on their RESET lines. The counter can be cascaded in the ripple mode by connecting Q4 to the enable input of the subsequent counter while the CLOCK input of the latter is held low.
Positive- or negative-edge triggering
Synchronous internal carry propagation
100% Tested for quiescent current at 20V
Standardized, symmetrical output characteristics
Meets all requirements of JEDEC tentative standard #13B
