The ADP7157 is an adjustable linear regulator that operates from 2.3 V to 5.5 V and provides up to 1.2 A of output current. Output voltages from 1.2 V to 3.3 V are possible depending on the model. Using an advanced proprietary architecture, the device provides high power supply rejection and ultralow noise, achieving excellent line and load transient response with only a 10 μF ceramic output capacitor.
The ADP7157 is available in four models that optimize power dissipation and PSRR performance as a function of the input and output voltage.
The typical output noise the ADP7157 regulator is 0.9 μV rms from 100 Hz to 100 kHz and 1.7 nV/√Hz for noise spectral density from 10 kHz to 1 MHz. The ADP7157 is available in 10-lead, 3 mm × 3 mm LFCSP and 8-lead SOIC packages, making it not only a very compact solution, but also providing excellent thermal performance for applications requiring up to 1.2 A of output current in a small, low profile footprint.
Applications
Regulation to noise sensitive applications: phase-locked loops (PLLs), voltage controlled oscillators (VCOs), and PLLs with integrated VCOs
Communications and infrastructure
Backhaul and microwave links
### Features and Benefits
Input voltage range: 2.3 V to 5.5 V
Adjustable output voltage range (VOUT): 1.2 V to 3.3 V
Maximum load current: 1.2 A
Low noise
0.9 µV rms typical output noise from 100 Hz to 100 kHz
1.6 µV rms typical output noise from 10 Hz to 100 kHz
Noise spectral density: 1.7 nV/√Hz from 10 kHz to 1 MHz
Power supply rejection ratio (PSRR)
82 dB from 1 kHz to 100 kHz
55 dB at 1 MHz
Dropout voltage: 120 mV typical at IOUT = 1.2 A, VOUT = 3.3 V
Initial accuracy: ±0.6% at ILOAD = 10 mA
Accuracy over line, load, and temperature: ±1.5%
Operating supply current (IGND)
4.0 mA typical at 0 µA
7.0 mA typical at 1.2 A
Low shutdown current: 0.2 μA typical
Stable with a 10 µF ceramic output capacitor
10-lead, 3 mm × 3 mm LFCSP and 8-lead SOIC packages
