The ADF420x family of dual frequency synthesizers are used to implement local oscillators in the upconversion and downconversion sections of wireless receivers and transmitters. Each synthesizer consists of a low noise, digital, phase frequency detector (PFD); a precision charge pump; a programmable reference divider; programmable A and B counters; and a dual modulus prescaler (P/P + 1). The A (6-bit) and B (11-bit) counters, in conjunction with the dual modulus prescaler (P/P + 1), implement an N divider (N = BP + A). In addition, the 14-bit reference counter (R counter) allows selectable REFIN frequencies at the PFD input. The on-chip oscillator circuitry allows the reference input to be derived from crystal oscillators.
A complete phase-locked loop (PLL) can be implemented if the synthesizers are used with an external loop filter and voltage controlled oscillators (VCOs).
Control of all the on-chip registers is via a simple 3-wire interface. The devices operate with a power supply ranging from 2.7 V to 5.5 V and can be powered down when not in use.
**Applications**
Wireless handsets (GSM, PCS, DCS, CDMA, WCDMA)
Base stations for wireless radio (GSM, PCS, DCS, CDMA, WCDMA)
Wireless LANS Communications test equipment
CATV equipment
### Features and Benefits
2.0 GHz/1.1 GHz
2.7 V to 5.5 V power supply
Selectable charge pump supply (VP) allows extended tuning voltage in 3 V systems
