The AD7960BCPZ is a 18-bit charge redistribution successive approximation Analog-to-digital Converter (ADC) contains a low power high speed, an internal conversion clock and an internal reference buffer. The SAR architecture allows unmatched performance both in noise and in linearity. On the CNV± edge the converter samples the voltage difference between the IN+ and IN- pins. The voltages on these pins swing in opposite phase between 0 and 4.096V and between 0 and 5V. The reference voltage is applied to the part externally. All conversion results are available on a single LVDS self clocked or echoed clock serial interface.
