下载
CY22050
One-PLL General-Purpose
Flash-Programmable Clock Generator
Cypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600
Document Number: 38-07006 Rev. *O Revised January 28, 2015
One-PLL Gene ral-Purpose Flas h-Programmable Clock Generato r
Features
■ Integrated phase-locked loop (PLL)
■ Commercial and Industrial operation
■ Flash-programmable
■ Field-programmable
■ Low-skew, low-jitter, high-accuracy outputs
■ 3.3 V operation with 2.5 V output option
■ 16-pin TSSOP package (CY22050)
■ Input frequency range:
❐ 8 MHz–30 MHz (external crystal)
❐ 1 MHz–133 MHz (driven clock)
■ Output frequency range:
❐ Commercial temperature
• 8 kHz–200 MHz (3.3 V)
• 8 kHz–166.6 MHz (2.5 V)
❐ Industrial temperature
• 8 kHz–166.6 MHz (3.3 V)
• 8 kHz–150 MHz (2.5 V)
Functional Description
The CY22050 is programmable clock generator for use in
networking, telecommunication, datacom, and other
general-purpose applications. The CY22050 offers up to six
configurable outputs in a 16-pin TSSOP, running off a 3.3 V
power supply. The on-chip reference oscillator is designed to run
off an 8–30-MHz crystal, or a 1–133-MHz external clock signal.
The CY22050 has a single PLL driving 6 programmable output
clocks. The output clocks are derived from the PLL or the
reference frequency (REF). Output post dividers are available for
either. Four of the outputs can be set as 3.3 V or 2.5 V, for use
in a wide variety of portable and low-power applications.
For a complete list of related documentation, click here.
XIN
XOUT
Divider
PLL
OSC.
LCLK3
Q
P
VCO
VDDL
AVSS
AVDD
VSS
LCLK2
LCLK4
CLK5
CLK6
VSSLVDD
Bank 1
Divider
Bank 2
Output
Select
OE
PWRDWN
LCLK1
Matrix
Logic Block Diagram
页面指南
