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MMPF0200NPAEP 产品设计参考 - NXP

更新时间: 2025-06-18 12:11:31 (UTC+8)

MMPF0200NPAEP 产品设计参考

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TPS65910
,
TPS65910A
,
TPS65910A3
,
TPS659101
TPS659102
,
TPS659103
,
TPS659104
,
TPS659105
TPS659106, TPS659107, TPS659108, TPS659109
SWCS046U MARCH 2010REVISED OCTOBER 2014
TPS65910x Integrated Power-Management Unit Top Specification
1 Device Overview
1.1 Features
1
Embedded Power Controller Two Enable Signals Multiplexed with SR-I
2
C,
Configurable to Control any Supply State and
Two Efficient Step-Down DC-DC Converters for
Processor Cores Supply Voltage
Processor Cores
Thermal Shutdown Protection and Hot-Die
One Efficient Step-Down DC-DC Converter for I/O
Detection
Power
An RTC Resource With:
One Efficient Step-Up 5-V DC-DC Converter
Oscillator for 32.768-kHz Crystal or 32-kHz
SmartReflex™ Compliant Dynamic Voltage
Built-in RC Oscillator
Management for Processor Cores
Date, Time, and Calendar
8 LDO Voltage Regulators and One Real-Time
Clock (RTC) LDO (Internal Purpose) Alarm Capability
One High-Speed I
2
C Interface for General-Purpose One Configurable GPIO
Control Commands (CTL-I
2
C)
DC-DC Switching Synchronization Through
One High-Speed I
2
C Interface for SmartReflex Internal or External 3-MHz Clock
Class 3 Control and Command (SR-I
2
C)
1.2 Applications
Portable and Handheld Systems Industrial Systems
1.3 Description
The TPS65910 device is an integrated power-management IC available in 48-QFN package and
dedicated to applications powered by one Li-Ion or Li-Ion polymer battery cell or 3-series Ni-MH cells, or
by a 5-V input; it requires multiple power rails. The device provides three step-down converters, one step-
up converter, and eight LDOs and is designed to support the specific power requirements of OMAP-based
applications.
Two of the step-down converters provide power for dual processor cores and are controllable by a
dedicated class-3 SmartReflex interface for optimum power savings. The third converter provides power
for the I/Os and memory in the system.
The device includes eight general-purpose LDOs providing a wide range of voltage and current
capabilities. The LDOs are fully controllable by the I
2
C interface. The use of the LDOs is flexible; they are
intended to be used as follows: Two LDOs are designated to power the PLL and video DAC supply rails
on the OMAP-based processors, four general-purpose auxiliary LDOs are available to provide power to
other devices in the system, and two LDOs are provided to power DDR memory supplies in applications
requiring these memories.
In addition to the power resources, the device contains an embedded power controller (EPC) to manage
the power sequencing requirements of the OMAP systems and an RTC.
Table 1-1. Device Information
(1)
PART NUMBER PACKAGE (PIN) BODY SIZE
TPS65910 PVQFN (48) 6.00 mm × 6.00 mm
(1) For more information, see Section 8, Mechanical Packaging and Orderable Information.
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
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