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Octal, 12-/14-/16-Bit DAC with 5 ppm/°C
On-Chip Reference in 14-Lead TSSOP
AD5628/AD5648/AD5668
Rev. B
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FEATURES
Low power, smallest-pin-compatible octal DACs
AD5668: 16 bits
AD5648: 14 bits
AD5628: 12 bits
14-lead/16-lead TSSOP
On-chip 1.25 V/2.5 V, 5 ppm/°C reference
Power down to 400 nA @ 5 V, 200 nA @ 3 V
2.7 V to 5.5 V power supply
Guaranteed monotonic by design
Power-on reset to zero scale or midscale
3 power-down functions
Hardware
LDAC
and
LDAC
override function
CLR
function to programmable code
Rail-to-rail operation
APPLICATIONS
Process control
Data acquisition systems
Portable battery-powered instruments
Digital gain and offset adjustment
Programmable voltage and current sources
Programmable attenuators
FUNCTIONAL BLOCK DIAGRAM
INTERFACE
LOGIC
INPUT
REGISTER
DIN
LDAC
GND
V
OUT
H
V
DD
LDAC
1
V
REFIN
/
V
REFOUT
SYNC
SCLK
AD5628/AD5648/AD5668
CLR
1
1
RU-16 PACKAGE ONLY
1.25V/2.5V
REF
V
OUT
A
V
OUT
B
V
OUT
C
V
OUT
D
V
OUT
E
V
OUT
F
V
OUT
G
DAC
REGISTER
STRING
DAC A
BUFFER
INPUT
REGISTER
DAC
REGISTER
STRING
DAC B
BUFFER
INPUT
REGISTER
DAC
REGISTER
STRING
DAC C
BUFFER
INPUT
REGISTER
DAC
REGISTER
STRING
DAC D
BUFFER
INPUT
REGISTER
DAC
REGISTER
STRING
DAC E
BUFFER
INPUT
REGISTER
DAC
REGISTER
STRING
DAC F
BUFFER
INPUT
REGISTER
DAC
REGISTER
STRING
DAC G
BUFFER
INPUT
REGISTER
DAC
REGISTER
STRING
DAC H
BUFFER
POWER-DOWN
LOGIC
POWER-ON
RESET
05302-001
Figure 1.
GENERAL DESCRIPTION
The AD5628/AD5648/AD5668 devices are low power, octal,
12-/14-/16-bit, buffered voltage-output DACs. All devices
operate from a single 2.7 V to 5.5 V supply and are guaranteed
monotonic by design.
The AD5628/AD5648/AD5668 have an on-chip reference with
an internal gain of 2. The AD5628/AD5648/AD5668-1 have a
1.25 V 5 ppm/°C reference, giving a full-scale output range of
2.5 V; the AD5628/AD5648/AD5668-2, -3 have a 2.5 V 5 ppm/°C
reference, giving a full-scale output range of 5 V. The on-board
reference is off at power-up, allowing the use of an external refer-
ence. The internal reference is enabled via a software write.
The part incorporates a power-on reset circuit that ensures that the
DAC output powers up to 0 V (AD5628/AD5648/AD5668-1, -2)
or midscale (AD5668-3) and remains powered up at this level
until a valid write takes place. The part contains a power-down
feature that reduces the current consumption of the device to
400 nA at 5 V and provides software-selectable output loads
while in power-down mode for any or all DAC channels.
The outputs of all DACs can be updated simultaneously
using the
LDAC
function, with the added functionality of user-
selectable DAC channels to simultaneously update. There is also
an asynchronous
CLR
that updates all DACs to a user-
programmable code—zero scale, midscale, or full scale.
The AD5628/AD5648/AD5668 utilize a versatile 3-wire serial
interface that operates at clock rates of up to 50 MHz and is
compatible with standard SPI®, QSPI™, MICROWIRE™, and
DSP interface standards. The on-chip precision output amplifier
enables rail-to-rail output swing.
PRODUCT HIGHLIGHTS
1. Octal, 12-/14-/16-bit DAC.
2. On-chip 1.25 V/2.5 V, 5 ppm/°C reference.
3. Available in 14-lead/16-lead TSSOP.
4. Power-on reset to 0 V or midscale.
5. Power-down capability. When powered down, the DAC
typically consumes 200 nA at 3 V and 400 nA at 5 V.
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