The UCD30xx devices are members of a family of digital PWM controllers from Texas Instruments providing a single-chip control solution for digital power-conversion applications. These devices allow digital control implementation of a high-performance, high-frequency power supply with flexible configuration of parameters, supervisory, monitoring, and communication functions.
The UCD30xx are fully programmable solutions that are configurable to support a wide range of isolated and non-isolated topologies in single- or multiphase configurations. Some examples include interleaved PFC, isolated forward, half-bridge, phase-shifted full bridge, active clamp, and resonant LLC.
At the core of the UCD30xx controllers are the digital control-loop peripherals, also known as Fusion Digital Power peripherals (FDPP). Each FDPP implements a high-speed digital control loop consisting of a dedicated error analog-to-digital converter (EADC), a three-pole/three-zero (3p, 3z) digital compensator, and two DPWM outputs with 250-ps pulse-width resolution. The device also contains a 12-bit, 200-ksps general-purpose ADC with up to 15 channels, timers, interrupt controls, and communications ports such as PMBus, SCI, and SPI. The device is based on a 32-bit ARM7 RISC CPU that performs real-time monitoring, configures peripherals, and manages communications. The CPU executes its program out of programmable flash memory as well as ROM.
The UCD30xx is supported by Texas Instruments" Code Composer Studio software development environment.
* Digital Control of up to Four Voltage Feedback Loops
* Up to Eight High-Resolution Digital Pulsewidth Modulated (DPWM) Outputs for Supporting a Wide Range of Offline, Isolated and Non-Isolated DC-to-DC Topologies
250-ps DPWM Pulse-Width Resolution
4-ns DPWM Frequency Resolution
Adjustable Phase Shift Between DPWM Outputs
Adjustable Dead Band Between Each DPWM Pair
Active-High or -Low DPWM Polarity
Up to 2-MHz DPWM Switching Frequency
* Dedicated High-Speed Error Analog-to-Digital Converter (EADC) for Each Feedback Loop With Sense Resolution of up to 1 mV
* On-Chip 10-Bit D and A Converter (DAC) for Setting EADC Reference Voltage
* Dedicated Hardware Accelerated Digital Compensators or Control Law Accelerators (CLA)
Three-Pole, Three-Zero Configurable Compensator
Features Non-Linear Digital Control
Multiple Programmable Coefficient Registers for Adaptive Digital Compensation
* Up to 15-Channel, 12-Bit, 200-ksps, Analog-to-Digital Converter (ADC)
* Multiple Levels of Fault Protection
Four High-Speed Analog Comparators
External Fault Inputs
12-Bit ADC
* Configurable for Voltage-Mode, Average-Current-Mode, and Resonant-Mode Control
* Allows Synchronization of DPWM Waveforms Between Multiple UCD3040, UCD3020 and UCD3028 (UCD30xx) Devices
* Adjustable DPWM Pulse Width Enables Support for Current Balancing in a Multiphase Application.
