The TMS320LF240x devices, new members of the TMS320C24x generation of digital signal processor (DSP) controllers, are part of the TMS320C2000 platform of fixed-point DSPs. The 240x devices offer the enhanced TMS320 DSP architectural design of the C2xx core CPU for low-cost, low-power, and high-performance processing capabilities. Several advanced peripherals, optimized for digital motor and motion control applications, have been integrated to provide a true single-chip DSP controller. While code-compatible with the existing C24x DSP controller devices, the 240x offers increased processing performance (30 MIPS) and a higher level of peripheral integration. See the TMS320x240x Device Summary section for device-specific features.
The 240x generation offers an array of memory sizes and different peripherals tailored to meet the specific price/performance points required by various applications. Flash devices of up to 32K words offer a cost-effective reprogrammable solution for volume production. Note that Flash-based devices contain a 256-word boot ROM to facilitate in-circuit programming. The 240x family also includes ROM devices that are fully pin-to-pin compatible with their Flash counterparts. (The ROM devices are described in the SPRS145 data sheet.)
All 240x devices offer at least one event manager module which has been optimized for digital motor control and power conversion applications. Capabilities of this module include center- and/or edge-aligned PWM generation, programmable deadband to prevent shoot-through faults, and synchronized analog-to-digital conversion. Devices with dual event managers enable multiple motor and/or converter control with a single 240x DSP controller.
The high-performance, 10-bit analog-to-digital converter (ADC) has a minimum conversion time of 500 ns and offers up to 16 channels of analog input. The autosequencing capability of the ADC allows a maximum of 16 conversions to take place in a single conversion session without any CPU overhead.
A serial communications interface (SCI) is integrated on all devices to provide asynchronous communication to other devices in the system. For systems requiring additional communication interfaces, the 2407 and 2406 offer a 16-bit synchronous serial peripheral interface (SPI). The 2407 and 2406 also offer a controller area network (CAN) communications module that meets 2.0B specifications. To maximize device flexibility, functional pins are also configurable as general-purpose inputs/outputs (GPIOs).
To streamline development time, JTAG-compliant scan-based emulation has been integrated into all devices. This provides non-intrusive real-time capabilities required to debug digital control systems. A complete suite of code-generation tools from C compilers to the industry-standard Code Composer Studio debugger supports this family. Numerous third-party developers not only offer device-level development tools, but also system-level design and development support.
TMS320LF2407, TMS320LF2406, and TMS320LF2402 are Being Replaced by TMS320LF2407A, TMS320LF2406A, and TMS320LF2402A, Respectively. Hence, TMS320LF2407, TMS320LF2406, and TMS320LF2402 are NOT RECOMMENDED FOR NEW DESIGNS (NRND).
High-Performance Static CMOS Technology
33-ns Instruction Cycle Time (30 MHz)
30-MIPS Performance
Low-Power 3.3-V Design
Based on TMS320C2xx DSP CPU Core
Code-Compatible With F243/F241/C242
Instruction Set and Module Compatible With F240/C240
On-Chip Memory
Up to 32K Words x 16 Bits of Flash EEPROM (4 Sectors)
Up to 2.5K Words x 16 Bits of Data/Program RAM
544 Words of Dual-Access RAM
Up to 2K Words of Single-Access RAM
* Boot ROM
SCI/SPI Bootloader
* Two Event-Manager (EV) Modules (EVA and EVB), Each Include:
Two 16-Bit General-Purpose Timers
Eight 16-Bit Pulse-Width Modulation (PWM) Channels Which Enable:
Three-Phase Inverter Control
Center- or Edge-Alignment of PWM Channels
Emergency PWM Channel Shutdown With External PDPINTx\ Pin
