The TMS320C5x generation of the Texas Instruments (TI™) TMS320 digital signal processors (DSPs) is fabricated with static CMOS integrated circuit technology; the architectural design is based upon that of an earlier TI DSP, the TMS320C25. The combination of advanced Harvard architecture, on-chip peripherals, on-chip memory, and a highly specialized instruction set is the basis of the operational flexibility and speed of the "C5x devices. They execute up to 50 million instructions per second (MIPS).
The "C5x devices offer these advantages:
* Enhanced TMS320 architectural design for increased performance and versatility
* Modular architectural design for fast development of spin-off devices
* Advanced integrated-circuit processing technology for increased performance
* Upward-compatible source code (source code for "C1x and "C2x DSPs is upward compatible with "C5x DSPs.)
* Enhanced TMS320 instruction set for faster algorithms and for optimized high-level language operation
* New static-design techniques for minimizing power consumption and maximizing radiation tolerance
Table 1 provides a comparison of the devices in the "C5x generation. It shows the capacity of on-chip RAM and ROM memories, number of serial and parallel I/O ports, execution time of one machine cycle, and type of package with total pin count.
Powerful 16-Bit TMS320C5x CPU
20-, 25-, 35-, and 50-ns Single-Cycle Instruction Execution Time for 5-V Operation
25-, 40-, and 50-ns Single-Cycle Instruction Execution Time for 3-V Operation
Single-Cycle 16 × 16-Bit Multiply/Add
224K × 16-Bit Maximum Addressable External Memory Space (64K Program, 64K Data, 64K I/O, and 32K Global)
2K, 4K, 8K, 16K, 32K × 16-Bit Single-Access On-Chip Program ROM
