The DM355 is a highly integrated, programmable platform for digital still camera, digital photo frames, IP security cameras, 4-channel digital video recorders, video door bell application, and other low cost portable digital video applications. Designed to offer portable video designers and manufacturers the ability to produce affordable portable digital video solutions with high picture quality, the DM355 combines high performance MPEG4 HD (720p) codecs and JPEG codecs up to 50M pixels per second, high quality, and low power consumption at a very low price point. The DM355 also enables seamless interface to most additional external devices required for a complete digital camera implementation. The interface is flexible enough to support various types of CCD and CMOS sensors, signal conditioning circuits, power management, DDR/mDDR memory, SRAM, NAND, shutter, Iris and auto-focus motor controls, etc.
The DM355 processor core is an ARM926EJ-S RISC processor. The ARM926EJ-S is a 32-bit processor core that performs 32-bit and 16-bit instructions and processes 32-bit, 16-bit, and 8-bit data. The core uses pipelining so that all parts of the processor and memory system can operate continuously. The ARM core incorporates:
A coprocessor 15 (CP15) and protection module
Data and program Memory Management Units (MMUs) with table look-aside buffers.
Separate 16K-byte instruction and 8K-byte data caches. Both are four-way associative with virtual index virtual tag (VIVT).
DM355 performance is enhanced by its MPEG4/JPEG coprocessor. The MPEG4/JPEG coprocessor performs the computational operations required for image processing; JPEG compression and MPEG4 video and imaging standard. The MPEG4/JPEG coprocessor supports MPEG4 SP at HD (720p), D1, VGA, SIF encode/decode resolutions and JPEG encode/decode up to 50M pixels per second.
The DM355 device has a Video Processing Subsystem (VPSS) with two configurable video/imaging peripherals:
A Video Processing Front-End (VPFE)
A Video Processing Back-End (VPBE)
The VPFE port provides an interface for CCD/CMOS imager modules and video decoders. The VPBE provides hardware On Screen Display (OSD) support and composite NTSC/PAL and digital LCD output.
The DM355 peripheral set includes:
An inter-integrated circuit (I2C) Bus interface
Two audio serial ports (ASP)
Three 64-bit general-purpose timers each configurable as two independent 32-bit timers
A 64-bit watchdog timer
Up to 104-pins of general-purpose input/output (GPIO) with programmable interrupt/event generation modes, multiplexed with other peripherals
Three UARTs with hardware handshaking support on one UART
Three serial port Interfaces (SPI)
Four pulse width modulator (PWM) peripherals
Four real time out (RTO) outputs
Two Multi-Media Card / Secure Digital (MMC/SD/SDIO) interfaces
Wireless interfaces (Bluetooth, WLAN, WUSB) through SDIO
A USB 2.0 full and high-speed device and host interface
Two external memory interfaces:
An asynchronous external memory interface (AEMIF) for slower memories/peripherals such as NAND and OneNAND.
A high speed synchronous memory interface for DDR2/mDDR.
For software development support the DM355 has a complete set of ARM development tools which include: C compilers, assembly optimizers to simplify programming and scheduling, and a Windows™ debugger interface for visibility into source code execution.
Get started today with production-ready, easy-to-use audio and video codecs for digital media processors based on DaVinci™ technology. Also available are various O/S Board Support Packages and software updates. All codecs are available for FREE evaluation. REQUEST FREE SOFTWARE!
High-Performance Digital Media System-on-Chip (DMSoC)
Up to 270-MHz ARM926EJ-S™ Clock Rate
MPEG4/JPEG Coprocessor Supports
Up to 720p MPEG4 SP
Up to 50M Pixels per Second JPEG
Video Processing Subsystem
Hardware IPIPE for Real-Time Image Processing
Up to 14-bit CCD/CMOS Digital Interface
Histogram Module
Resize Image 1/16x to 8x
Hardware On-Screen Display
Supports digital HDTV (720p/1080i) output for connection to external encoder
Peripherals include DDR and mDDR SDRAM, 2 MMC/SD/SDIO and SmartMedia Flash Card Interfaces, USB 2.0, 3 UARTs and 3 SPIs
Configurable Power-Saving Modes
On-Chip ARM ROM Bootloader (RBL) to Boot From NAND Flash, MMC/SD, or UART
Extended Temperature 135- and 216-MHz Devices are Available
3.3-V and 1.8-V I/O, 1.3-V Core
Debug Interface Support
337-Pin Ball Grid Array at 65 nm Process Technology
High-Performance Digital Media System-on-Chip
135-, 216-, and 270-MHz ARM926EJ-S Clock Rate
Fully Software-Compatible With ARM9
Extended Temperature support for 135- and 216-Mhz Devices are Available
ARM926EJ-S Core
Support for 32-Bit and 16-Bit (Thumb Mode) Instruction Sets
DSP Instruction Extensions and Single Cycle MAC
ARM® Jazelle® Technology
EmbeddedICE-RT™ Logic for Real-Time Debug
ARM9 Memory Architecture
16K-Byte Instruction Cache
8K-Byte Data Cache
32K-Byte RAM
8K-Byte ROM
Little Endian
MPEG4/JPEG Coprocessor
Fixed Function Coprocessor Supports:
MPEG4 SP Codec at HD (720p), D1, VGA, SIF
JPEG Codec up to 50M Pixels per Second
Video Processing Subsystem
Front End Provides:
Hardware IPIPE for Real-Time Processing
up to 14-bit CCD/CMOS Digital Interface
16-/8-bit Generic YcBcR-4:2 Interface (BT.601)
10-/8-bit CCIR6565/BT655 Interface
Up to 75-MHz Pixel Clock
Histogram Module
Resize Engine
Resize Images From 1/16x to 8x
Separate Horizontal/Vertical Control
Two Simultaneous Output Paths
Back End Provides:
Hardware On-Screen Display (OSD)
Composite NTSC/PAL video encoder output
8-/16-bit YCC and Up to 18-Bit RGB666 Digital Output
BT.601/BT.656 Digital YCbCr 4:2:2 (8-/16-Bit) Interface
Supports digital HDTV (720p/1080i) output for connection to external encoder
External Memory Interfaces (EMIFs)
DDR2 and mDDR SDRAM 16-bit wide EMIF With 256 MByte Address Space (1.8-V I/O)
Asynchronous16-/8-bit Wide EMIF (AEMIF)
Flash Memory Interfaces
NAND (8-/16-bit Wide Data)
OneNAND(16-bit Wide Data)
Flash Card Interfaces
Two Multimedia Card (MMC) / Secure Digital (SD/SDIO)
