The TMS320C30 is the newest member of the TMS320C3x generation of DSPs from Texas Instruments (TITM). The TMS320C30 is a 32-bit floating-point processor manufactured in 0.7-mm triple-level-metal CMOS technology.
The TMS320C30\x92s internal busing and special DSP instruction set have the speed and flexibility to execute up to 50 MFLOPS (million floating-point operations per second). The TMS320C30 optimizes speed by implementing functions in hardware that other processors implement through software or microcode. This hardware-intensive approach provides performance previously unavailable on a single chip.
The TMS320C30 can perform parallel multiply and ALU operations on integer or floating-point data in a single cycle. Each processor also possesses a general-purpose register file, a program cache, dedicated ARAUs, internal dual-access memories, one DMA channel supporting concurrent I/ O, and a short machine-cycle time. High performance and ease of use are results of these features.
General-purpose applications are enhanced greatly by the large address space, multiprocessor interface, internally and externally generated wait states, two external interface ports, two timers, serial ports, and multiple interrupt structure. The TMS320C30 supports a wide variety of system applications from host processor to dedicated coprocessor.
High-level language support is implemented easily through a register-based architecture, large address space, powerful addressing modes, flexible instruction set, and well-supported floating-point arithmetic.
High-Performance Floating-Point Digital Signal Processor (DSP)
TMS320C30-50 (5 V)
40-ns Instruction Cycle Time
275 MOPS, 50 MFLOPS, 25 MIPS
TMS320C30-40 (5 V)
50-ns Instruction Cycle Time
220 MOPS, 40 MFLOPS, 20 MIPS
TMS320C30-33 (5 V)
60-ns Instruction Cycle Time
183.3 MOPS, 33.3 MFLOPS, 16.7 MIPS
TMS320C30-27 (5 V)
74-ns Instruction Cycle Time
148.5 MOPS, 27 MFLOPS, 13.5 MIPS
32-Bit High-Performance CPU
16-/ 32-Bit Integer and 32-/ 40-Bit Floating-Point Operations
32-Bit Instruction Word, 24-Bit Addresses
Two 1K \xD7 32-Bit Single-Cycle Dual-Access On-Chip RAM Blocks
One 4K \xD7 32-Bit Single-Cycle Dual-Access On-Chip ROM Block
On-Chip Memory-Mapped Peripherals:
Two Serial Ports
Two 32-Bit Timers
One-Channel Direct Memory Access (DMA) Coprocessor for Concurrent I/O and CPU Operation
