The Texas Instruments TFP101 and TFP101A are TI _PanelBus_ flat panel display products, part of a comprehensive family of end-to-end DVI 1.0 compliant solutions. Targeted primarily at desktop LCD monitors and digital projectors, the TFP101/101A finds applications in any design requiring high-speed digital interface.
The TFP101/101A supports display resolutions up to XGA in 24-bit true color pixel format. The TFP101/101A offers design flexibility to drive one or two pixels per clock, supports TFT or DSTN panels, and provides an option for time staggered pixel outputs for reduced ground bounce.
PowerPAD advanced packaging technology results in best of class power dissipation, footprint, and ultra-low ground inductance.
The TFP101/101A combines _PanelBus_ circuit innovation with TIs advanced 0.18-µm EPIC-5 CMOS process technology, along with TI PowerPAD package technology to achieve a reliable, low-powered, low noise, high-speed digital interface solution.
Supports XGA Resolution (Output Pixel Rates Up to 86 MHz)
Digital Visual Interface (DVI) Specification Compliant1
True-Color, 24 Bit/Pixel, 16.7M Colors at 1 or 2-Pixels Per Clock
Laser Trimmed Internal Termination Resistors for Optimum Fixed Impedance Matching
Skew Tolerant Up to One Pixel Clock Cycle
4x Over-Sampling
Reduced Power Consumption 1.8 V Core Operation With 3.3 V I/Os and Supplies2
Reduced Ground Bounce Using Time Staggered Pixel Outputs
Lowest Noise and Best Power Dissipation Using TI PowerPAD Packaging
Advanced Technology Using TI 0.18-µm EPIC-5 CMOS Process
TFP101A Incorporates HSYNC Jitter Immunity3
_PanelBus_, PowerPAD and EPIC-5 are trademarks of Texas Instruments.
I2C is a licensed bus protocol from Phillips Semiconductor, Inc.
1. The Digital Visual Interface Specification, DVI, is an industry standard developed by the Digital Display Working Group (DDWG) for high-speed digital connection to digital displays The TFP101 and TFP101A are compliant to the DVI Specification Rev. 1.0.
2. The TFP101/101A has an internal voltage regulator that provides the 1.8-V core power supply from the externally supplied 3.3-V supplies.
3. The TFP101A incorporates additional circuitry to create a stable HSYNC from DVI transmitters that introduce undesirable jitter on the transmitted HSYNC signal.
