* e200 32-bit CPU core complex built on Power Architecture technology * Display control unit (DCU) for direct drive of TFT displays up to WQVGA resolution * Stepper motor drivers (for driving up to six instrumentation gauges) * 40 x 4 segment LCD display driver * Up to 1 MB on-chip flash with separate 64k data flash for EEPROM emulation * Up to 48 KB on-chip SRAM with error correcting codes (ECC) * Up to 160 KB on-chip graphics SRAM (no ECC) * Parallel data interface (PDI) for digital video input * Sound generation and playback using PWM channels and DMA * Quad serial peripheral interface (QSPI) flash controller * Ultra-Reliable MCUs