These 12-bit buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.
The 3-state control gate is a 2-input AND gate with active-low inputs so that if either output-enable (OE1\ or OE2\\) input is high, all 12 outputs are in the high-impedance state.
The outputs, which are designed to source or sink up to 12 mA, include equivalent 25- series resistors to reduce overshoot and undershoot.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
The SN54ABT5402A is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ABT5402A is characterized for operation from -40°C to 85°C.
Output Ports Have Equivalent 25- Series Resistors, So No External Resistors Are Required
State-of-the-Art **_EPIC-_**II **_B_**TM BiCMOS Design Significantly Reduces Power Dissipation
Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17
Typical V**OLP** (Output Ground Bounce) < 1 V at V**CC** = 5 V, T**A** = 25°C
Typical V**OLV** (Output Undershoot) < 0.5 V at V**CC** = 5 V, T**A** = 25°C
Package Options Include Plastic Small-Outline (DW) Package and Ceramic Chip Carriers (FK) and DIPs (JT)
EPIC-IIB is a trademark of Texas Instruments Incorporated.
