The SN74ABT126D is a quadruple bus Buffer Gate features independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is low. When VCC is between 0 and 2.1V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 2.1V, OE should be tied to GND through a pull-down resistor and the minimum value of the resistor is determined by the current-sourcing capability of the driver.
High-impedance state during power up and power down
IOFF and power-up 3-state support hot insertion
Latch-up performance exceeds 500mA per JESD-17
<1V at VCC = 5V, TA = 25°C VOLP (output ground bounce)