The RM48L952PGET is a 32-bit high-performance RISC Flash Microcontroller for safety systems. The safety architecture includes dual CPUs in lockstep, CPU and memory BIST logic, ECC on both the flash and the data SRAM, parity on peripheral memories and loopback capability on peripheral I/Os. The RM48L952 device integrates the ARM Cortex-R4F floating-point CPU. The CPU offers an efficient 1.66 DMIPS/MHz and has configurations that can run up to 220MHz, providing up to 365 DMIPS. The device supports the little-endian [LE] format. The RM48L952 device has 3MB of integrated flash and 256kB of data RAM. Both the flash and RAM have single-bit error correction and double-bit error detection. The flash memory on this device is a non-volatile, electrically erasable and programmable memory implemented with a 64-bit-wide data bus interface. The flash operates on a 3.3V supply input (same level as I/O supply) for all read, program and erase operations.
Dual CPUs running in lockstep
ECC on flash and RAM interfaces
Built-in self-test (BIST) for CPU and on-chip RAMs
Error signalling module with error pin
Voltage and clock monitoring
Efficient 1.66 DMIPS/MHz with 8-stage pipeline
FPU with single- and double-precision
Memory protection unit (MPU) - 12 region
Open architecture with third-party support
16-bit External memory interface
Consistent memory map across family
Real-time interrupt (RTI) timer OS timer
96-channel Vectored interrupt module (VIM)
2-channel Cyclic redundancy checker (CRC)
Direct memory access (DMA) controller
Frequency-modulated phase-locked loop 9FMPLL) with built-in slip detector
Separate no modulating PLL
Trace and calibration capabilities
10/100Mbps Ethernet MAC (EMAC) - IEEE 802.3 compliant
2-port USB host controller, one full-speed USB device port
