This ultra-low-power MSP430FRxx FRAM microcontroller family consists of several devices featuring embedded nonvolatile FRAM, a 16-bit CPU, and different sets of peripherals targeted for various applications. The architecture, FRAM, and peripherals, combined with seven low-power modes, are optimized to achieve extended battery life in portable and wireless sensing applications. FRAM is a new nonvolatile memory that combines the speed, flexibility, and endurance of SRAM with the stability and reliability of flash, all at lower total power consumption.
Embedded Microcontroller
16-Bit RISC Architecture up to 16-MHz Clock
Wide Supply Voltage Range (1.8 V to 3.6 V) (Minimum supply voltage is restricted by SVS levels.)
Optimized Ultra-Low-Power Modes
Active Mode: Approximately 100 µA/MHz
Standby (LPM3 With VLO): 0.4 µA (Typical)
Real-Time Clock (RTC) (LPM3.5): 0.35 µA (Typical) (The RTC is clocked by a 3.7-pF crystal.)
Shutdown (LPM4.5): 0.04 µA (Typical)
Ultra-Low-Power Ferroelectric RAM (FRAM)
Up to 64KB of Nonvolatile Memory
Ultra-Low-Power Writes
Fast Write at 125 ns per Word (64KB in 4 ms)
Unified Memory = Program, Data, and Storage in One Single Space
1015 Write Cycle Endurance
Radiation Resistant and Nonmagnetic
Intelligent Digital Peripherals
32-Bit Hardware Multiplier (MPY)
Three-Channel Internal Direct Memory Access (DMA)
RTC With Calendar and Alarm Functions
Five 16-Bit Timers With up to Seven Capture/Compare Registers
16-Bit and 32-Bit Cyclic Redundancy Checker (CRC16, CRC32)
High-Performance Analog
Up to 8-Channel Analog Comparator
12-Bit Analog-to-Digital Converter (ADC) With Internal Reference and Sample-and-Hold and up to 8 External Input Channels
Code Security and Encryption
128-Bit or 256-Bit AES Security Encryption and Decryption Coprocessor (MSP430FR59xx(1) Only)
True Random Number Seed for Random Number Generation Algorithm
Lockable Memory Segments for IP Encapsulation and Secure Storage
Multifunction Input/Output Ports
All I/O Pins Support Capacitive Touch Capability Without Need for External Components
Accessible Bit-, Byte- and Word-Wise (in Pairs)
Edge-Selectable Wakeup From LPM on Ports P1 to P4
Programmable Pullup and Pulldown on All Ports
Enhanced Serial Communication
eUSCI_A0 and eUSCI_A1 Support:
UART With Automatic Baud-Rate Detection
IrDA Encode and Decode
SPI at Rates up to 10 Mbps
eUSCI_B0 and eUSCI_B1 Support:
I2C With Multiple-Slave Addressing
SPI at Rates up to 10 Mbps
Flexible Clock System
Fixed-Frequency DCO With 10 Selectable Factory-Trimmed Frequencies
