MCP3919A1-E/SSMicrochipアナログ・デジタルコンバータ - ADC 3 Chnl Energy Meter Front End 3V SPI/2 AFE General Purpose 3ADC 24Bit 3.3V Automotive Medical 28Pin SSOP T/R
¥
3.45
显示的图像仅供参考,应从产品数据表中获得准确的规格。
MCP3919A1-E/SSMicrochip
制造商:
Microchip
制造商型号#:
MCP3919A1-E/SS
百芯编号#:
CM6113267
价格(CNY):
¥
3.45
百芯库存:
212
个
库存地点:
可供应量:
170
个在库
此为供应商库存,需要与销售确认
产品类别:
接口,芯片
产品描述:
アナログ・デジタルコンバータ - ADC 3 Chnl Energy Meter Front End 3V SPI/2 AFE General Purpose 3ADC 24Bit 3.3V Automotive Medical 28Pin SSOP T/R
The MCP3919A1-E/SS is a 3-channel Analog Front End (AFE) containing three synchronous sampling delta-sigma analog-to-digital converters (ADC), three PGAs, phase delay compensation block, low-drift internal voltage reference, digital offset and gain error calibration registers and high-speed 20MHz SPI-compatible serial interface. The MCP3919 ADCs are fully configurable with features such as: 16/24-bit resolution, Oversampling Ratio (OSR) from 32 to 4096, gain from 1x to 32x, independent Shutdown and Reset, dithering and autozeroing. The MCP3919 includes advanced security features to secure the communications and the configuration settings such as a CRC-16 checksum on both serial data outputs and static register map configuration. The MCP3919 is capable of interfacing with a variety of voltage and current sensors, including shunts, current transformers, Rogowski coils and hall-effect sensors.
93.5dB SINAD, -107dBc Total harmonic distortion (THD) (up to 35th harmonic)
112dBFS SFDR for each channel
Enables 0.1% typical active power measurement error over a 10,000:1 dynamic range
16-bit Cyclic redundancy check (CRC) checksum on all communications for secure data transfers
16-bit CRC checksum and interrupt alert for register map configuration
Register map lock with 8-bit secure key
Programmable data rate up to 125ksps
4MHz Maximum sampling frequency, 16MHz Maximum master clock
Ultra low-power shutdown mode with <10µA
-122dB Crosstalk between the two channels
9ppm/°C Low drift 1.2V internal voltage reference
Differential voltage reference input pins
High gain PGA on each channel (up to 32V/V)
Phase delay compensation with 1µs time resolution
Separate data ready pin for easy synchronization
Individual 24-bit Digital offset and gain error correction for each channel
High-speed 20MHz SPI Interface with mode 0,0 and 1,1 compatibility
Continuous read/write modes for minimum communication