* HCS12 CPU * Upward compatible with M68HC11 instruction set * Interrupt stacking and programmer"s model identical to M68HC11 * Instruction queue * Enhanced indexed addressing * Up to 16 KB of RAM * Three asynchronous serial communications interface modules (SCI) * Serial peripheral interface (SPI) * Inter-IC bus (IIC) * Three 4-channel 16-bit timer modules (TIM) * 6-channel 15-bit pulse modulator with fault protection module (PMF) * 6-channel 8-bit pulse width modulator (PWM) * 16-channel 10-bit analog-to-digital converter (ADC) * Two 1-channel 8-bit digital-to-analog converters (DAC) * Module mapping control (MMC) * Interrupt control (INT) * Background debug module (BDM) * Debugger (DBG12) including breakpoints and change-of-flow trace buffer * Multiplexed external bus interface (MEBI) * Wake-up interrupt inputs * Up to 16 port bits available for wake-up interrupt function with digital filtering * Memory options * 32, 64, 128 and 256 KB flash EEPROM * 2, 4, 8 or 16 KB RAM