Name: MC56F8023
Brand: Freescale
SKU: CM1827599806
Availability: InStock

显示的图像仅供参考，应从产品数据表中获得准确的规格。

MC56F8023 Freescale

制造商:
Freescale
制造商型号#:
MC56F8023
百芯编号#:
CM1827599806
价格(CNY):
百芯库存:
271 个
库存地点:
可供应量:
192 个在库

此为供应商库存，需要与销售确认
产品描述:
16Bit Digital Signal Controllers
文档:
数据手册
3D模型

MC56F8023 购买 MC56F8023 库存和价格更新于 2025-06-12 03:50:22

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器件型号: MC56F8023

百芯编号: CM1827599806

制造商: Freescale

价格

总计: 463 个

MOQ: 1

库存地点: 香港

发货日期: 2025/06/17 (预期 )

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MC56F8023 数据规格书

MC56F8023 数据手册Datasheet

156 Pages, 1023 KB

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产品概述

56F8023 Description
The 56F8023 is a member of the 56800E core-based family of Digital Signal Controllers (DSCs). It combines, on a single chip, the processing power of a DSP and the functionality of a microcontroller with a flexible set of peripherals to create an extremely cost-effective solution. Because of its low cost, configuration flexibility, and compact program code, the 56F8023 is well-suited for many applications. The 56F8023 includes many peripherals that are especially useful for industrial control, motion control, home appliances, general-purpose inverters, smart sensors, fire and security systems, switched-mode power supply, power management, and medical monitoring applications.
56F8023 Features
Digital Signal Controller Core
• Efficient 16-bit 56800E family Digital Signal Controller (DSC) engine with dual Harvard architecture
• As many as 32 Million Instructions Per Second (MIPS) at 32MHz core frequency
• Single-cycle 16 × 16-bit parallel Multiplier-Accumulator (MAC)
• Four 36-bit accumulators, including extension bits
• 32-bit arithmetic and logic multi-bit shifter
• Parallel instruction set with unique DSP addressing modes
• Hardware DO and REP loops
• Three internal address buses
• Four internal data buses
• Instruction set supports both DSP and controller functions
• Controller-style addressing modes and instructions for compact code
• Efficient C compiler and local variable support
• Software subroutine and interrupt stack with depth limited only by memory
• JTAG/Enhanced On-Chip Emulation (OnCE) for unobtrusive, processor speed-independent, real-time debugging
Memory
• Dual Harvard architecture permits as many as three simultaneous accesses to program and data memory
• Flash security and protection that prevent unauthorized users from gaining access to the internal Flash
• On-chip memory
— 32KB of Program Flash
— 4KB of Unified Data/Program RAM
• EEPROM emulation capability using Flash
Peripheral Circuits for 56F8023
• One multi-function six-output Pulse Width Modulator (PWM) module
— Up to 96MHz PWM operating clock
— 15 bits of resolution
— Center-aligned and edge-aligned PWM signal mode
— Four programmable fault inputs with programmable digital filter
— Double-buffered PWM registers
— Each complementary PWM signal pair allows selection of a PWM supply source from:
– PWM generator
– External GPIO
– Internal timers
– Analog comparator outputs
– ADC conversion result which compares with values of ADC high- and low-limit registers to set PWM output
• Two independent 12-bit Analog-to-Digital Converters (ADCs)
— 2 x 3 channel inputs
— Supports both simultaneous and sequential conversions
— ADC conversions can be synchronized by both PWM and timer modules
— Sampling rate up to 2.67MSPS
— 16-word result buffer registers
• Two internal 12-bit Digital-to-Analog Converters (DACs)
— 2 μs settling time when output swing from rail to rail
— Automatic waveform generation generates square, triangle and sawtooth waveforms with programmable period, update rate, and range
• One 16-bit multi-purpose Quad Timer module (TMR)
— Up to 96MHz operating clock
— Eight independent 16-bit counter/timers with cascading capability
— Each timer has capture and compare capability
— Up to 12 operating modes
• One Queued Serial Communication Interface (QSCI) with LIN Slave functionality
— Full-duplex or single-wire operation
— Two receiver wake-up methods:
– Idle line
– Address mark
— Four-bytes-deep FIFOs are available on both transmitter and receiver
• One Queued Serial Peripheral Interfaces (QSPI)
— Full-duplex operation
— Master and slave modes
— Four-words-deep FIFOs available on both transmitter and receiver
— Programmable Length Transactions (2 to 16 bits)
• One Inter-Integrated Circuit (I2C) port
— Operates up to 400kbps
— Supports both master and slave operation
— Supports both 10-bit address mode and broadcasting mode
• One 16-bit Programmable Interval Timer (PIT)
• Two analog Comparators (CMPs)
— Selectable input source includes external pins, DACs
— Programmable output polarity
— Output can drive Timer input, PWM fault input, PWM source, external pin output and trigger ADCs
— Output falling and rising edge detection able to generate interrupts
• Computer Operating Properly (COP)/Watchdog timer capable of selecting different clock sources
• Up to 26 General-Purpose I/O (GPIO) pins with 5V tolerance
• Integrated Power-On Reset and Low-Voltage Interrupt Module
• Phase Lock Loop (PLL) provides a high-speed clock to the core and peripherals
• Clock sources:
— On-chip relaxation oscillator
— External clock: Crystal oscillator, ceramic resonator, and external clock source
• JTAG/EOnCE debug programming interface for real-time debugging

MC56F8023 数据手册 >

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