The DS90CF386 receiver converts the four LVDS data streams (Up to 2.38 Gbps throughput or 297.5 Megabytes/sec bandwidth) back into parallel 28 bits of CMOS/TTL data (24 bits of RGB and 4 bits of Hsync, Vsync, DE and CNTL). Also available is the DS90CF366 that converts the three LVDS data streams (Up to 1.78 Gbps throughput or 223 Megabytes/sec bandwidth) back into parallel 21 bits of CMOS/TTL data (18 bits of RGB and 3 bits of Hsync, Vsync and DE).
Features
20 to 85 MHz shift clock support
Rx power consumption<142 mW (typ)@85MHz Grayscale
Rx Power-down mode<1.44 mW (max)
ESD rating>7 kV (HBM),>700V (EIAJ)
Supports VGA, SVGA, XGA and Single Pixel SXGA.
PLL requires no external components
Compatible with TIA/EIA-644 LVDS standard
Low profile 56-lead or 48-lead TSSOP package
DS90CF386 also available in a 64 ball, 0.8mm fine pitch
