The CDCM7005RGZT is a high-performance low phase noise/low skew Clock Synchronizer that synchronizes a VCXO (voltage controlled crystal oscillator) or VCO (voltage controlled oscillator) frequency to one of the two reference clocks. The programmable pre-divider M and the feedback-dividers N and P give a high flexibility to the frequency ratio of the reference clock to VC(X)O VC(X)O_IN clock operates up to 2.2GHz. Through the selection of external VC(X)O and loop filter components, the PLL loop bandwidth and damping factor can be adjust to meet different system requirements. The CDCM7005 can lock to one of two reference clock inputs (PRI_REF and SEC_REF), supports frequency hold-over mode and fast-frequency-locking for fail-safe and increased system redundancy. The output of the CDCM7005 is user definable and can be any combination of up to five LVPECL outputs or up to 10 LVCMOS outputs. The built in synchronization latches ensure that all outputs are synchronized for low output skew.
VCXO_IN Clock is synchronized to one of the two reference clocks
Efficient jitter cleaning from low PLL loop bandwidth
Low phase noise PLL core
Programmable phase offset (PRI_REF and SEC_REF to outputs)
Wide charge pump current range from 200µA to 3mA
Frequency hold-over mode improves fail-safe operation
