The CD74HCT125M96 is a high speed CMOS logic Quad Buffer with 3-state outputs. It contains 4 independent 3-state buffers, each having its own output enable input, which when HIGH puts the output in the high impedance state.
Separate output enable inputs
Balanced propagation delay and transition times
Significant power reduction compared to LSTTL logic Ics
Standard outputs - 10 LSTTL loads
Bus driver outputs - 15 LSTTL loads
CMOS input compatibility, Il
Direct LSTTL input logic compatibility, VIL = 0.8V maximum, VIH = 2V minimum