Each of these data selectors/multiplexers contains inverters and drivers to supply full binary decoding data selection to the AND-OR gates. Separate strobe (G)\ inputs are provided for each of the two 4-line sections.
Inputs Are TTL-Voltage Compatible
Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption
Balanced Propagation Delays
±24-mA Output Drive Current
Fanout to 15 F Devices
SCR-Latchup-Resistant CMOS Process and Circuit Design
Exceeds 2-kV ESD Protection Per MIL-STD-883, Method 3015
