The CD4035BE is a 4-stage CMOS parallel in/parallel out Shift Register for synchronous parallel inputs to each stage and serial inputs to the first stage via JK\ logic. Register stages 2, 3 and 4 are coupled in a serial D flip-flop configuration when the register is in the serial mode (parallel/serial control low). parallel entry into each register stage is permitted when the parallel/serial control is high. In the parallel or serial mode information is transferred on positive clock transitions. When the TRUE/COMPLEMENT control is high, the true contents of the register are available at the output terminals. When the TRUE/COMPLEMENT control is low, the outputs are the complements of the data in the register. The TRUE/COMPLEMENT control functions asynchronously with respect to the clock signal. JK\ input logic is provided on the first stage serial input to minimize logic requirements particularly in counting and sequence-generation applications.
Synchronous parallel entry on all 4 stages
JK\ Inputs on first stage
Asynchronous true/complement control on all outputs
