The ADP7182 is a CMOS, low dropout (LDO) linear regulator that operates from −2.7 V to −28 V and provides up to −200 mA of output current. This high input voltage LDO is ideal for regulation of high performance analog and mixed signal circuits operating from −27 V down to −1.2 V rails. Using an advanced proprietary architecture, it provides high power supply rejection and low noise, and achieves excellent line and load transient response with a small 2.2 μF ceramic output capacitor.
The ADP7182 is available in fixed output voltage and an adjustable version that allows the output voltage to range from −1.22 V to −VIN \+ VDO via an external feedback divider.
The following fixed output voltages are available from stock: −5 V (3 mm × 3 mm LFCSP), −1.8 V, −2.5 V, −3 V, −5 V (TSOT), −1.2 V, −1.5 V, −2.5 V, −5 V (2 mm × 2 mm LFCSP). Additional voltages are available by special order.
The ADP7182 regulator output noise is 18 μV rms independent of the output voltage. The enable logic is capable of interfacing with positive or negative logic levels for maximum flexibility.
The ADP7182 is available in 5-lead TSOT, 6- and 8-lead LFCSP packages for a small, low profile footprint.
Applications
Regulation to noise sensitive applications
Analog-to-digital converter (ADC) and digital-to-analog converter (DAC) circuits, precision amplifiers
Communications and infrastructure
Medical and healthcare
Industrial and instrumentation
### Features and Benefits
Low noise: 18 μV rms
Power supply rejection ratio (PSRR): 66 dB at 10 kHz at VOUT = −3 V
Positive or negative enable logic
Stable with small 2.2 μF ceramic output capacitor
Input voltage range: −2.7 V to −28 V
Maximum output current: −200 mA
Low dropout voltage: −185 mV at −200 mA load
Initial accuracy: ±1%
Accuracy over line, load, and temperature
+2% maximum/−3% minimum
Low quiescent current, IGND = −650 μA with −200 mA load
