The ADM4850 / ADM4851 / ADM4852 / ADM4853 / ADM4854 / ADM4855 / ADM4856 / ADM4857 are differential line transceivers suitable for high speed, half-duplex and full duplex data communication on multipoint bus transmission lines. They are designed for balanced data transmission and comply with EIA Standards RS-485 and RS-422. The ADM4850 / ADM4851 / ADM4852 / ADM4853 are half-duplex transceivers that share differential lines and have separate enable inputs for the driver and receiver. The full duplex ADM4854 / ADM4855 / ADM4856 / ADM4857 transceivers have dedicated differential line driver outputs and receiver inputs.
The devices have a 1/8-unit load receiver input impedance, which allows up to 256 transceivers on one bus. Because only one driver must be enabled at any time, the output of a disabled or powered down driver is three-stated to avoid overloading the bus.
The receiver inputs have a true fail-safe feature, which ensures a logic high output level when the inputs are open or shorted.
This guarantees that the receiver outputs are in a known state before communication begins and when communication ends. The driver outputs are slew rate limited to reduce EMI and data errors caused by reflections from improperly terminated buses. Excessive power dissipation caused by bus contention or by output shorting is prevented with a thermal shutdown circuit.
The devices are fully specified over the commercial and industrial temperature ranges and are available in 8-lead SOIC (ADM4850 through ADM4857), 8-lead LFCSP (ADM4850 / ADM4852 / ADM4853), and 8-lead MSOP (ADM4850 only) packages.
