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EN032 (v1.2) September 24, 2007 www.xilinx.com 1
Errata Notice
© 2007 Xilinx, Inc. All rights reserved. All Xilinx trademarks, registered trademarks, patents, and disclaimers are as listed at http://www.xilinx.com/legal.htm.
All other trademarks and registered trademarks are the property of their respective owners. All specifications are subject to change without notice.
Introduction
Thank you for your interest in the Xilinx Spartan™-3AN family XC3S400AN FPGA device engineering samples. Although
Xilinx has made every effort to ensure the highest possible quality, these devices are subject to the limitations described in
this errata notification. These errata do not apply to the XC3S400AN production FPGAs.
Device Identification
These errata apply to the XC3S400AN engineering samples as shown in Ta ble 1. See the top marking in Figure 1.
Traceability
XC3S400AN engineering samples are marked as shown in Figure 1. The other devices listed in Ta bl e 1 are marked simi-
larly.
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Spartan-3AN XC3S400AN FPGA
Errata for Engineering Samples
EN032 (v1.2) September 24, 2007
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Errata Notice
Tabl e 1 : XC3S400AN Devices Affected by These Errata
Device Types XC3S400AN
Packages All
Speed Grades -4
Date Codes All
Marked as "ES" Yes
Figure 1: XC3S400AN FPGA Top Marking
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