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May 2009 Doc ID 9685 Rev 7 1/272
1
UPSD33xx
Turbo series
fast 8032 MCU with programmable logic
Features
■ Fast 8-bit Turbo 8032 MCU, 40 MHz
– Advanced core, 4-clocks per instruction
– 10 MIPs, peak performance at 40 MHz
(5 V)
– JTAG debug and in-system programming
– Branch cache and6 instruction prefetch
queue
– Dual XDATA pointers with auto increment
and decrement
– Compatible with 3rd party 8051 tools
■ Dual Flash memories with memory
management
– Place either memory into 8032 program
address space or data address space
– Read-while-write operation for in-
application programming and EEPROM
emulation
– Single voltage program and erase
– 100K guaranteed erase cycles, 15-year
retention
■ Clock, reset, and supply management
– Flexible 8-level CPU clock divider register
– Normal, Idle, and Power-down modes
– Power-on and low voltage reset supervisor
– Programmable watchdog timer
■ Programmable logic, general purpose
– 16 macrocells
– Create shifters, state machines, chip-
selects, glue-logic to keypads, panels,
LCDs, others
■ Packages are ECOPACK
®
■
Communication interfaces
–I
2
C master/slave controller, 833 kHz
– SPI master controller, 10 MHz
– Two UARTs with independent baud rate
– IrDA protocol support up to 115 Kbaud
– Up to 46 I/O, 5 V tolerant on 3.3 V
UPSD33xxV
■ A/D converter
– Eight channels, 10-bit resolution, 6 µs
■ Timers and interrupts
– Three 8032 standard 16-bit timers
– Programmable counter array (PCA), six 16-
bit modules for PWM/CAPCOM/timers
– 8/10/16-bit PWM operation
– 11 interrupt sources with two external
interrupt pins
■ Operating voltage source (±10%)
– 5 V devices use both 5.0 V and 3.3 V
– 3.3 V devices use only 3.3 V source
Table 1. Device summary
LQFP52 (T) 52-lead, thin, quad, Flat
LQFP80 (U) 80-lead, thin, quad, flat
Reference Part number
UPSD33xx
UPSD3312D, UPSD3333D, UPSD3334D, UPSD3354D
UPSD3312DV, UPSD3333DV, UPSD3334DV, UPSD3354DV
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