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UCC25705DGKTRG4
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UCC25705DGKTRG4 用户编程手册 - TI

更新时间: 2025-04-04 19:38:02 (UTC+8)

UCC25705DGKTRG4 用户编程手册

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    
SLUS241D − MARCH 1994 - REVISED NOVEMBER 2003
1
www.ti.com
D Integrated 0.15- Power MOSFET
D 3-V to 8-V Operation
D Digital Programmable Current Limit
from 0 A to 3 A
D Electronic Circuit Breaker Function
D 1µA I
CC
When Disabled
D Programmable On-Time
D Programmable Start Delay
D Fixed 3% Duty Cycle
D Unidirectional Switch
D Thermal Shutdown
D Fault-Output Indicator
D Maximum-Output Current Can Be Set to 1 A
Above the Programmed Fault Level or to a
Full 4 A
D Power SOIC, Low-Thermal Resistance
Packaging
description
The UCC3912 family of hot swap power managers provides complete power management, hot swap capability,
and circuit breaker functions. The only component required to operate the device, other than supply bypassing,
is the fault timing capacitor, C
T
. All control and housekeeping functions are integrated, and externally
programmable. These include the fault current level, maximum output-sourcing current, maximum fault time,
and startup delay. In the event of a constant fault, the internal fixed 3% duty cycle ratio limits average output
power.
The internal 4-bit DAC allows programming of the fault level current from 0 A to 3 A with 0.25-A resolution. The
IMAX control pin sets the maximum sourcing current to 1 A above the fault level when driven low, and to a full
4 A when driven high for applications which require fast output capacitor charging.
When the output current is below the fault level, the output MOSFET is switched on with a nominal on resistance
of 0.15 . When the output current exceeds the fault level, but is less than the maximum sourcing level, the
output remains switched on, but the fault timer starts charging C
T
. Once C
T
charges to a preset threshold, the
switch is turned off, and remains off for 30 times the programmed fault time. When the output current reaches
the maximum sourcing level, the MOSFET transitions from a switch to a constant current source. (continued)
block diagram
UDG-99146
B1 B0
6 7 8
2
3
9 11 16
0 A−3 A
0.25
RES
B3 B2
5 4 13 12
CT
ON TIME
CONTROL
3% DUTY
CYCLE
+
THERMAL
SHUTDOWN
INTERNAL
BIAS
+
1
SHTDWN
14
15
1.5 V
H = OPEN
FAULT
CURRENT SENSE
+
+
CHARGE
PUMP
30 mV
V
OUT
REVERSE VOLTAGE
COMPARATOR
+
LINEAR CURRENT AMPLIFIER
1 A
ABOVE
FAULT
10IMAX
GND
HEATSINK
GND PINS
CURRENT FAULT
LEVEL 0A TO 3 A
OVERCURRENT
COMPARATOR
MAX CURRENT
LEVEL
4 A
H = 4 A VIN
VIN
VOUT
VOUT
POWER
FET
4 BIT DAC
Copyright 2003, Texas Instruments Incorporated
   ! "#$ !  %#&'" ($)
(#"! "  !%$""! %$ *$ $!  $+! !#$!
!(( ,-) (#" %"$!!. ($!  $"$!!'- "'#($
$!.  '' %$$!)
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
www.BDTIC.com/TI
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