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2004 Microchip Technology Inc. DS39603C-page 1
M
PIC16F818/819
This document includes programming
specifications for the following devices:
• PIC16F818
• PIC16F819
1.0 PROGRAMMING THE
PIC16F818/819
The PIC16F818/819 is programmed using a serial
method. The Serial mode will allow the PIC16F818/819
to be programmed while in the user’s system, which
allows for increased design flexibility. This programming
specification applies to PIC16F818/819 devices in all
packages.
1.1 Programming Algorithm
Requirements
The programming algorithm used depends on the
operating voltage (V
DD) of the PIC16F818/819 device.
Both algorithms can be used with the two available
programming entry methods. The first method, called
Low-Voltage ICSP
TM
(LVP for short), applies VDD to
MCLR
and uses the I/O pin RB3 to enter Programming
mode. When RB3 is driven to V
DD from ground, the
PIC16F818/819 device enters Programming mode.
The second method follows the normal Microchip
Programming mode entry of holding pins RB6 and RB7
low, while raising the MCLR
pin from VIL to VIHH
(13V ± 0.5V).
1.2 Programming Mode
The Programming mode for the PIC16F818/819 allows
programming of user program memory, data memory,
special locations used for ID, and the configuration
word.
PIC16F818/819 18-Pin DIP, SOIC
Algorithm # VDD Range
12.0V≤ V
DD <5.5V
24.5V≤ V
DD ≤ 5.5V
RA1/AN1
RA0/AN0
RA7/OSC1/CLKI
RA6/OSC2/CLKO
V
DD
RB7/T1OSI/PGD
RB6/T1OSO/T1CKI/PGC
RB5/SS
RB4/SCK/SCL
RA2/AN2/VREF-
RA3/AN3/V
REF
+
RA4/AN4/T0CKI
RA5/MCLR
/VPP
V
SS
RB0/INT
RB1/SDI/SDA
RB2/SDO/CCP1
(1)
RB3/CCP1
(1)
/PGM
1
2
3
4
5
6
7
8
9
18
17
16
15
14
13
12
11
10
PIC16F818/819
Note 1: Location of CCP1 function is determined by CCPMX.
Flash Memory Programming Specification
