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2011 Microchip Technology Inc. Advance Information DS41316C-page 1
PIC12F519
This document includes the
programming specifications for the
following devices:
•PIC12F519
1.0 PROGRAMMING THE
PIC12F519
The PIC12F519 is programmed using a serial method.
The Serial mode will allow the PIC12F519 to be
programmed while in the user’s system. This allows for
increased design flexibility. This programming
specification applies to the PIC12F519 devices in all
packages.
1.1 Hardware Requirements
The PIC12F519 requires one power supply for VDD
(5.0V) and one for VPP (12.5V).
1.2 Program/Verify Mode
The Program/Verify mode for the PIC12F519 allows
programming of user program memory, user ID
locations, backup OSCCAL location and the
Configuration Word.
FIGURE 1-1: PIC12F519 8-PIN 2X3 DFN DIAGRAM
FIGURE 1-2: PIC12F519 8-PIN PDIP, SOIC, AND MSOP DIAGRAM
TABLE 1-1: PIN DESCRIPTIONS DURING PROGRAMMING
Pin Name
During Programming
Function Pin Type Pin Description
RB1 ICSPCLK I Clock input – Schmitt Trigger input
RB0 ICSPDAT I/O Data input/output – Schmitt Trigger input
MCLR
/VPP/RB3 Program/Verify mode P
(1)
Programming Power
V
DD VDD P Power Supply
VSS VSS P Ground
Legend: I = Input, O = Output, P = Power
Note 1: In the PIC12F519, the programming high voltage is internally generated. To activate the Program/Verify
mode, high voltage of I
IHH current capability (see Table 6-1) needs to be applied to the MCLR input.
RB1/ICSPCLK
VSS
RB0/ICSPDAT
RB2/T0CKI
VDD
RB4/OSC2
RB5/OSC1/CLKIN
RB3/MCLR
/VPP
1
2
3
4
8
7
6
5
PIC12F519
PIC12F519
1
2
3
4
5
6
7
8
VDD
RB5/OSC1/CLKIN
RB4/OSC2
RB3/MCLR
/VPP
Vss
RB0/ICSPDAT
RB1/ICSPCLK
RB2/T0CKI
PIC12F519 Memory Programming Specification
