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MK20DN512VLK10
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MK20DN512VLK10 用户编程手册 - NXP

更新时间: 2025-05-11 23:26:31 (UTC+8)

MK20DN512VLK10 用户编程手册

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K20P81M100SF2V2
K20 Sub-Family
Supports the following:
MK20DX256VLK10, MK20DN512VLK10
Features
Operating Characteristics
Voltage range: 1.71 to 3.6 V
Flash write voltage range: 1.71 to 3.6 V
Temperature range (ambient): -40 to 105°C
Performance
Up to 100 MHz ARM Cortex-M4 core with DSP
instructions delivering 1.25 Dhrystone MIPS per
MHz
Memories and memory interfaces
Up to 512 KB program flash memory on non-
FlexMemory devices
Up to 128 KB RAM
Serial programming interface (EzPort)
FlexBus external bus interface
Clocks
3 to 32 MHz crystal oscillator
32 kHz crystal oscillator
Multi-purpose clock generator
System peripherals
Multiple low-power modes to provide power
optimization based on application requirements
Memory protection unit with multi-master
protection
16-channel DMA controller, supporting up to 63
request sources
External watchdog monitor
Software watchdog
Low-leakage wakeup unit
Security and integrity modules
Hardware CRC module to support fast cyclic
redundancy checks
128-bit unique identification (ID) number per chip
Human-machine interface
Low-power hardware touch sensor interface (TSI)
General-purpose input/output
Analog modules
Two 16-bit SAR ADCs
Programmable gain amplifier (PGA) (up to x64)
integrated into each ADC
12-bit DAC
Two transimpedance amplifiers
Three analog comparators (CMP) containing a 6-bit
DAC and programmable reference input
Voltage reference
Timers
Programmable delay block
Eight-channel motor control/general purpose/PWM
timer
Two 2-channel quadrature decoder/general purpose
timers
Periodic interrupt timers
16-bit low-power timer
Carrier modulator transmitter
Real-time clock
Communication interfaces
USB full-/low-speed On-the-Go controller with on-
chip transceiver
Two Controller Area Network (CAN) modules
Two SPI modules
Two I2C modules
Four UART modules
Secure Digital host controller (SDHC)
I2S module
Freescale Semiconductor
Document Number: K20P81M100SF2V2
Data Sheet: Technical Data
Rev. 3, 6/2013
Freescale reserves the right to change the detail specifications as may be
required to permit improvements in the design of its products.
© 2012–2013 Freescale Semiconductor, Inc.
页面指南

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